{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,4,27]],"date-time":"2023-04-27T21:52:34Z","timestamp":1682632354534},"reference-count":22,"publisher":"Hindawi Limited","license":[{"start":{"date-parts":[[2009,7,28]],"date-time":"2009-07-28T00:00:00Z","timestamp":1248739200000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["VLSI Design"],"published-print":{"date-parts":[[2009,7,28]]},"abstract":"<jats:p>Feed-forward techniques are explored for the design of high-frequency Operational\nTransconductance Amplifiers (OTAs). For single-stage amplifiers, a recycling folded-cascode OTA presents twice\nthe GBW (197.2\u2009MHz versus 106.3\u2009MHz) and more than twice the slew rate (231.1\u2009V\/s versus 99.3\u2009V\/s) as a conventional folded cascode OTA for the same load, power consumption, and transistor dimensions. It is demonstrated that the efficiency of the recycling folded-cascode is equivalent to that of a telescopic OTA. As for multistage amplifiers, a No-Capacitor Feed-Forward (NCFF) compensation scheme which uses a high-frequency pole-zero doublet to obtain\ngreater than 90\u2009dB DC gain, GBW of 325\u2009MHz and better than  phase margin is discussed. The settling-time- of the NCFF topology can be faster than that of OTAs with Miller compensation. Experimental results for the recycling folded-cascode OTA fabricated in TSMC 0.18\u2009m CMOS, and results of the NCFF demonstrate the efficiency and feasibility of the feed-forward schemes.<\/jats:p>","DOI":"10.1155\/2009\/323595","type":"journal-article","created":{"date-parts":[[2009,7,28]],"date-time":"2009-07-28T15:02:32Z","timestamp":1248793352000},"page":"1-11","source":"Crossref","is-referenced-by-count":2,"title":["Recent Advances on the Design of High-Gain Wideband Operational Transconductance Amplifiers"],"prefix":"10.1155","volume":"2009","author":[{"given":"Rida","family":"Assaad","sequence":"first","affiliation":[{"name":"Department of Electrical Engineering, Analog and Mixed Signal Center, Texas A&M University, College Station, TX 77843, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jose","family":"Silva-Martinez","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, Analog and Mixed Signal Center, Texas A&M University, College Station, TX 77843, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"98","reference":[{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/4.823453"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/4.913741"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/4.62165"},{"key":"6","year":"1995"},{"issue":"6","key":"7","doi-asserted-by":"crossref","first-page":"969","DOI":"10.1109\/JSSC.1982.1051851","volume":"17","year":"1982","journal-title":"IEEE Journal of Solid-State Circuits"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/4.50304"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/4.62197"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.819165"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.835823"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.819164"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1109\/4.52177"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1049\/el:20072031"},{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.814418"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1109\/4.987077"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.813216"},{"issue":"12","key":"22","doi-asserted-by":"crossref","first-page":"2000","DOI":"10.1109\/4.643658","volume":"32","year":"1997","journal-title":"IEEE Journal of Solid-State Circuits"},{"key":"23","doi-asserted-by":"publisher","DOI":"10.1109\/4.173096"},{"key":"24","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.835825"},{"key":"25","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.807410"},{"issue":"6","key":"26","doi-asserted-by":"crossref","first-page":"347","DOI":"10.1109\/JSSC.1974.1050527","volume":"9","year":"1974","journal-title":"IEEE Journal of Solid-State Circuits"},{"key":"27","doi-asserted-by":"publisher","DOI":"10.1109\/31.52726"},{"key":"28","doi-asserted-by":"publisher","DOI":"10.1109\/82.769789"}],"container-title":["VLSI Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/archive\/2009\/323595.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/downloads.hindawi.com\/archive\/2009\/323595.xml","content-type":"application\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/downloads.hindawi.com\/archive\/2009\/323595.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,12,8]],"date-time":"2020-12-08T20:08:59Z","timestamp":1607458139000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.hindawi.com\/journals\/vlsi\/2009\/323595\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,7,28]]},"references-count":22,"alternative-id":["323595","323595"],"URL":"https:\/\/doi.org\/10.1155\/2009\/323595","relation":{},"ISSN":["1065-514X","1563-5171"],"issn-type":[{"value":"1065-514X","type":"print"},{"value":"1563-5171","type":"electronic"}],"subject":[],"published":{"date-parts":[[2009,7,28]]}}}