{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,26]],"date-time":"2025-09-26T13:10:10Z","timestamp":1758892210746,"version":"3.37.3"},"reference-count":14,"publisher":"Wiley","license":[{"start":{"date-parts":[[2010,1,1]],"date-time":"2010-01-01T00:00:00Z","timestamp":1262304000000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["International Journal of Reconfigurable Computing"],"published-print":{"date-parts":[[2010]]},"abstract":"<jats:p>Modern digital systems demand increasing electronic resources, so the multiprocessor platforms are a suitable solution for them. This approach provides better results in terms of area, speed, and power consumption compared to traditional uniprocessor digital systems. Reconfigurable multiprocessor systems are a particular type of embedded system, implemented using reconfigurable hardware. This paper presents a review of this emerging research area. A number of state-of-the-art systems published in this field are presented and classified. Design methods and challenges are also discussed. Advances in FPGA technology are leading to more powerful systems in terms of processing and flexibility. Flexibility is one of the strong points of this kind of system, and multiprocessor systems can even be reconfigured at run time, allowing hardware to be adjusted to the demands of the application.<\/jats:p>","DOI":"10.1155\/2010\/570279","type":"journal-article","created":{"date-parts":[[2010,12,27]],"date-time":"2010-12-27T14:37:58Z","timestamp":1293460678000},"page":"1-10","source":"Crossref","is-referenced-by-count":14,"title":["Reconfigurable Multiprocessor Systems: A Review"],"prefix":"10.1155","volume":"2010","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-1760-5482","authenticated-orcid":true,"given":"Taho","family":"Dorta","sequence":"first","affiliation":[{"name":"Department of Electronics and Telecommunications, University of the Basque Country, UPV\/EHU, 48013 Bilbao, Spain"}]},{"given":"Jaime","family":"Jim\u00e9nez","sequence":"additional","affiliation":[{"name":"Department of Electronics and Telecommunications, University of the Basque Country, UPV\/EHU, 48013 Bilbao, Spain"}]},{"given":"Jos\u00e9 Luis","family":"Mart\u00edn","sequence":"additional","affiliation":[{"name":"Department of Electronics and Telecommunications, University of the Basque Country, UPV\/EHU, 48013 Bilbao, Spain"}]},{"given":"Unai","family":"Bidarte","sequence":"additional","affiliation":[{"name":"Department of Electronics and Telecommunications, University of the Basque Country, UPV\/EHU, 48013 Bilbao, Spain"}]},{"given":"Armando","family":"Astarloa","sequence":"additional","affiliation":[{"name":"Department of Electronics and Telecommunications, University of the Basque Country, UPV\/EHU, 48013 Bilbao, Spain"}]}],"member":"311","reference":[{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.923415"},{"issue":"6","key":"5","volume":"6","year":"2005","journal-title":"FPGA and Programmable Logic Journal"},{"issue":"24","key":"6","first-page":"20","volume":"52","year":"2004","journal-title":"Electronic Design"},{"issue":"5","key":"9","first-page":"423","volume":"4","year":"2005","journal-title":"WSEAS Transactions on Circuits and Systems"},{"issue":"2","key":"16","doi-asserted-by":"crossref","first-page":"2","DOI":"10.1145\/1399972.1399976","volume":"36","year":"2008","journal-title":"SIGARCH Computer Architecture News"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1155\/2009\/242981"},{"year":"1996","key":"11"},{"year":"1994","key":"13"},{"issue":"3","key":"21","first-page":"181","volume":"49","year":"2007","journal-title":"Information Technology Journal"},{"issue":"12","key":"29","doi-asserted-by":"crossref","first-page":"1901","DOI":"10.1109\/PROC.1966.5273","volume":"54","year":"1966","journal-title":"Proceedings of the IEEE"},{"key":"28","doi-asserted-by":"publisher","DOI":"10.1155\/2009\/395018"},{"key":"35","doi-asserted-by":"publisher","DOI":"10.1109\/2.976921"},{"key":"47","doi-asserted-by":"publisher","DOI":"10.1155\/2009\/863630"},{"key":"49","doi-asserted-by":"publisher","DOI":"10.1145\/1367045.1367049"}],"container-title":["International Journal of Reconfigurable Computing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/journals\/ijrc\/2010\/570279.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/downloads.hindawi.com\/journals\/ijrc\/2010\/570279.xml","content-type":"application\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/downloads.hindawi.com\/journals\/ijrc\/2010\/570279.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T13:42:08Z","timestamp":1497879728000},"score":1,"resource":{"primary":{"URL":"http:\/\/www.hindawi.com\/journals\/ijrc\/2010\/570279\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010]]},"references-count":14,"alternative-id":["570279","570279"],"URL":"https:\/\/doi.org\/10.1155\/2010\/570279","relation":{},"ISSN":["1687-7195","1687-7209"],"issn-type":[{"type":"print","value":"1687-7195"},{"type":"electronic","value":"1687-7209"}],"subject":[],"published":{"date-parts":[[2010]]}}}