{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,6]],"date-time":"2026-04-06T05:51:18Z","timestamp":1775454678652,"version":"3.50.1"},"reference-count":6,"publisher":"Hindawi Limited","license":[{"start":{"date-parts":[[2011,1,1]],"date-time":"2011-01-01T00:00:00Z","timestamp":1293840000000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["International Journal of Reconfigurable Computing"],"published-print":{"date-parts":[[2011]]},"abstract":"<jats:p>Mesh-based heterogeneous FPGAs are commonly used in industry and academia due to their area, speed, and power benefits over their homogeneous counterparts. These FPGAs contain a mixture of logic blocks and hard blocks where hard blocks are arranged in fixed columns as they offer an easy and compact layout. However, the placement of hard-blocks in fixed columns can potentially lead to underutilization of logic and routing resources and this problem is further aggravated with increase in the types of hard-blocks. This work explores and compares different floor-planning techniques of mesh-based FPGA to determine their effect on the area, performance, and power of the architecture. A tree-based architecture is also presented; unlike mesh-based architecture, the floor-planning of heterogeneous tree-based architecture does not affect its routing requirements due to its hierarchical structure. Both mesh and tree-based architectures are evaluated for three sets of benchmark circuits. Experimental results show that a more flexible floor-planning in mesh-based FPGA gives better results as compared to the column-based floor-planning. Also it is shown that compared to different floor-plannings of mesh-based FPGA, tree-based architecture gives better area, performance, and power results.<\/jats:p>","DOI":"10.1155\/2011\/121404","type":"journal-article","created":{"date-parts":[[2011,4,26]],"date-time":"2011-04-26T19:30:55Z","timestamp":1303846255000},"page":"1-18","source":"Crossref","is-referenced-by-count":20,"title":["Exploration of Heterogeneous FPGA Architectures"],"prefix":"10.1155","volume":"2011","author":[{"given":"Umer","family":"Farooq","sequence":"first","affiliation":[{"name":"LIP6, UPMC, 75005 Paris, France"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Husain","family":"Parvez","sequence":"additional","affiliation":[{"name":"LIP6, UPMC, 75005 Paris, France"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Habib","family":"Mehrez","sequence":"additional","affiliation":[{"name":"LIP6, UPMC, 75005 Paris, France"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zied","family":"Marrakchi","sequence":"additional","affiliation":[{"name":"FLEXRAS Technologies, 93521 Saint-Denis Cedex, France"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"98","reference":[{"key":"9","first-page":"126","year":"1996","journal-title":"Field-Programmable Logic Smart Applications, New Paradigms and Compilers"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/2.839324"},{"issue":"12","key":"16","first-page":"1469","volume":"20","year":"1971","journal-title":"IEEE Transactions on Computers"},{"issue":"2","key":"20","doi-asserted-by":"crossref","first-page":"510","DOI":"10.1109\/JSSC.1985.1052337","volume":"20","year":"1985","journal-title":"IEEE Journal of Solid-State Circuits"},{"issue":"4","key":"21","doi-asserted-by":"crossref","first-page":"329","DOI":"10.1155\/1996\/95942","volume":"4","year":"1996","journal-title":"VLSI Design"},{"key":"34","volume":"2009","year":"2009","journal-title":"International Journal of Reconfigurable Computing"}],"container-title":["International Journal of Reconfigurable Computing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/journals\/ijrc\/2011\/121404.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/downloads.hindawi.com\/journals\/ijrc\/2011\/121404.xml","content-type":"application\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/downloads.hindawi.com\/journals\/ijrc\/2011\/121404.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T23:24:23Z","timestamp":1497914663000},"score":1,"resource":{"primary":{"URL":"http:\/\/www.hindawi.com\/journals\/ijrc\/2011\/121404\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011]]},"references-count":6,"alternative-id":["121404","121404"],"URL":"https:\/\/doi.org\/10.1155\/2011\/121404","relation":{},"ISSN":["1687-7195","1687-7209"],"issn-type":[{"value":"1687-7195","type":"print"},{"value":"1687-7209","type":"electronic"}],"subject":[],"published":{"date-parts":[[2011]]}}}