{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,1,29]],"date-time":"2023-01-29T06:07:59Z","timestamp":1674972479038},"reference-count":11,"publisher":"Hindawi Limited","license":[{"start":{"date-parts":[[2011,10,12]],"date-time":"2011-10-12T00:00:00Z","timestamp":1318377600000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["VLSI Design"],"published-print":{"date-parts":[[2011,10,12]]},"abstract":"<jats:p>Minimizing the wirelength plays an important role in physical design automation of very large-scale integration (VLSI) chips. The objective of wirelength minimization can be achieved by  finding an optimal solution for  VLSI physical design components like partitioning and floorplanning. In VLSI circuit partitioning, the problem of obtaining a minimum delay has prime importance. In VLSI circuit floorplanning, the problem of minimizing  silicon area is also a hot issue. Reducing the minimum delay in partitioning and area in floorplanning helps to minimize the wirelength. The enhancements in partitioning and floorplanning have influence on  other criteria like power, cost, clock speed, and so forth. Memetic Algorithm (MA) is an Evolutionary Algorithm that includes one or more local search phases within its evolutionary cycle to obtain the minimum wirelength by reducing delay in partitioning and by reducing area in floorplanning. MA applies some sort of local search for optimization of VLSI partitioning and floorplanning. The algorithm combines a hierarchical design technique like genetic algorithm and  constructive technique like Simulated Annealing for  local search to solve VLSI partitioning and floorplanning problem. MA can  quickly produce optimal solutions for  the popular benchmark.<\/jats:p>","DOI":"10.1155\/2011\/896241","type":"journal-article","created":{"date-parts":[[2011,10,12]],"date-time":"2011-10-12T19:02:50Z","timestamp":1318446170000},"page":"1-9","source":"Crossref","is-referenced-by-count":4,"title":["Wirelength Minimization in Partitioning and Floorplanning Using Evolutionary Algorithms"],"prefix":"10.1155","volume":"2011","author":[{"given":"I. Hameem","family":"Shanavas","sequence":"first","affiliation":[{"name":"Department of Electronics and Communication, M. V. J. College of Engineering, Bangalore 560067, India"}]},{"given":"Ramaswamy Kannan","family":"Gnanamurthy","sequence":"additional","affiliation":[{"name":"Vivekanandha College of Engineering for Women, Trichengode 637205, Tamilnadu, India"}]}],"member":"98","reference":[{"key":"1","year":"1999"},{"issue":"4","key":"2","volume":"2","year":"2009","journal-title":"International Journal of Recent Trends in Engineering"},{"issue":"1","key":"3","volume":"37","year":"2007","journal-title":"IEEE Transactions on Systems, Man, and Cyber Net"},{"key":"5","first-page":"291","year":"1970","journal-title":"The Bell System Technical Journal"},{"key":"11","year":"1979"},{"issue":"4","key":"18","first-page":"461","volume":"1","year":"2009","journal-title":"International Journal of Computer Theory and Engineering"},{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/TEVC.2005.850260"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1126\/science.220.4598.671"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1007\/BF00940812"},{"issue":"6","key":"22","doi-asserted-by":"crossref","first-page":"1087","DOI":"10.1063\/1.1699114","volume":"21","year":"1953","journal-title":"The Journal of Chemical Physics"},{"issue":"8","key":"23","doi-asserted-by":"crossref","first-page":"967","DOI":"10.1016\/0895-7177(89)90202-1","volume":"12","year":"1989","journal-title":"Mathematical and Computer Modelling"}],"container-title":["VLSI Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/archive\/2011\/896241.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/downloads.hindawi.com\/archive\/2011\/896241.xml","content-type":"application\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/downloads.hindawi.com\/archive\/2011\/896241.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,12,9]],"date-time":"2020-12-09T07:10:35Z","timestamp":1607497835000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.hindawi.com\/journals\/vlsi\/2011\/896241\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,10,12]]},"references-count":11,"alternative-id":["896241","896241"],"URL":"https:\/\/doi.org\/10.1155\/2011\/896241","relation":{},"ISSN":["1065-514X","1563-5171"],"issn-type":[{"value":"1065-514X","type":"print"},{"value":"1563-5171","type":"electronic"}],"subject":[],"published":{"date-parts":[[2011,10,12]]}}}