{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,7,3]],"date-time":"2025-07-03T05:45:00Z","timestamp":1751521500695},"reference-count":12,"publisher":"Hindawi Limited","license":[{"start":{"date-parts":[[2011,1,19]],"date-time":"2011-01-19T00:00:00Z","timestamp":1295395200000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["VLSI Design"],"published-print":{"date-parts":[[2011,1,19]]},"abstract":"<jats:p>Test power is the major issue for current generation\nVLSI testing. It has become the biggest concern for today's SoC. \nWhile reducing the design efforts, the modular design approach\nin SoC (i.e., use of IP cores in SoC) has further exaggerated\nthe test power issue. It is not easy to select an effective low-power testing strategy from a large pool of diverse available\ntechniques. To find the proper solutions for test power reduction\nstrategy for IP core-based SoC, in this paper, starting\nfrom the terminology and models for power consumption during\ntest, the state of the art in low-power testing is presented. The\npaper contains the detailed survey on various power reduction\ntechniques proposed for all aspects of testing like external testing,\nBuilt-In Self-Test techniques, and the advances in DFT techniques\nemphasizing low power. Further, all the available low-power\ntesting techniques are strongly analyzed for their suitability to IP\ncore-based SoC.<\/jats:p>","DOI":"10.1155\/2011\/948926","type":"journal-article","created":{"date-parts":[[2011,1,19]],"date-time":"2011-01-19T19:38:39Z","timestamp":1295465919000},"page":"1-7","source":"Crossref","is-referenced-by-count":3,"title":["Suitability of Various Low-Power Testing Techniques for IP Core-Based SoC: A Survey"],"prefix":"10.1155","volume":"2011","author":[{"given":"Usha","family":"Mehta","sequence":"first","affiliation":[{"name":"PG-VLSI Design Group, EC Department, Institute of Technology, Nirma University, Ahmedabad 382 481, India"}]},{"given":"Kankar","family":"Dasgupta","sequence":"additional","affiliation":[{"name":"Space Application Centre, Indian Space Research Organization, Ahmedabad 380 015, India"}]},{"given":"Niranjan","family":"Devashrayee","sequence":"additional","affiliation":[{"name":"PG-VLSI Design Group, EC Department, Institute of Technology, Nirma University, Ahmedabad 382 481, India"}]}],"member":"98","reference":[{"key":"4","year":"1990"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.2006091"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2002.1003802"},{"key":"16","first-page":"1","volume":"4","year":"2009","journal-title":"IET Journal on Computers and Digital Techniques"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.923418"},{"key":"19","year":"1997"},{"key":"28","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.899234"},{"key":"29","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2007.70794"},{"key":"38","first-page":"317","year":"1999","journal-title":"Proceedings of the Asian Test Symposium"},{"key":"41","doi-asserted-by":"publisher","DOI":"10.1155\/2007\/67019"},{"key":"43","doi-asserted-by":"crossref","first-page":"1294","DOI":"10.1109\/TCAD.2005.850835","volume":"24","year":"2005","journal-title":"IEEE Transactions On Computer Aided Design of Integrated Circuits and Systems"},{"issue":"1-2","key":"45","doi-asserted-by":"crossref","first-page":"55","DOI":"10.1016\/S0167-9260(98)00021-2","volume":"26","year":"1998","journal-title":"Integration: The VLSI Journal"}],"container-title":["VLSI Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/archive\/2011\/948926.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/downloads.hindawi.com\/archive\/2011\/948926.xml","content-type":"application\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/downloads.hindawi.com\/archive\/2011\/948926.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,12,9]],"date-time":"2020-12-09T07:24:32Z","timestamp":1607498672000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.hindawi.com\/journals\/vlsi\/2011\/948926\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,1,19]]},"references-count":12,"alternative-id":["948926","948926"],"URL":"https:\/\/doi.org\/10.1155\/2011\/948926","relation":{},"ISSN":["1065-514X","1563-5171"],"issn-type":[{"value":"1065-514X","type":"print"},{"value":"1563-5171","type":"electronic"}],"subject":[],"published":{"date-parts":[[2011,1,19]]}}}