{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,7,30]],"date-time":"2025-07-30T14:38:46Z","timestamp":1753886326202,"version":"3.41.2"},"reference-count":8,"publisher":"Wiley","issue":"1","license":[{"start":{"date-parts":[[2012,1,23]],"date-time":"2012-01-23T00:00:00Z","timestamp":1327276800000},"content-version":"vor","delay-in-days":22,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"content-domain":{"domain":["onlinelibrary.wiley.com"],"crossmark-restriction":true},"short-container-title":["Journal of Electrical and Computer Engineering"],"published-print":{"date-parts":[[2012,1]]},"abstract":"<jats:p>A clock generator with an edge\u2010combiner DLL (ECDLL) has been developed for USB 2.0 applications. The clock generator generates 480\u2009MHz 10\u2010tap output signals from a 12\u2009MHz reference signal and consists of three DLLs to shrink the design area so that it is smaller than a conventional one based on a PLL. Each DLL is applied to our proposed shot pulse reset technique to prevent from a harmonic lock and is applied to a voltage\u2010controlled delay line (VCDL) with a trimming function to operate against any process voltage temperature (PVT) variations. A 90\u2009nm CMOS process was used to fabricate our proposed clock generator. The 480\u2009MHz 10\u2010tap output signals satisfy the USB 2.0 specifications. A power consumption is less than 1.3\u2009mW and a locking time is less than 3.5\u2009<jats:italic>\u03bc<\/jats:italic>s, which are far less than a conventional one, 10.0\u2009<jats:italic>\u03bc<\/jats:italic>s. The design area is 200 \u00d7 225\u2009<jats:italic>\u03bc<\/jats:italic>m, which is half that of the conventional one.<\/jats:p>","DOI":"10.1155\/2012\/267247","type":"journal-article","created":{"date-parts":[[2012,1,23]],"date-time":"2012-01-23T21:14:34Z","timestamp":1327353274000},"update-policy":"https:\/\/doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["480\u2009MHz 10\u2010tap Clock Generator Using Edge\u2010Combiner DLL for USB 2.0 Applications"],"prefix":"10.1155","volume":"2012","author":[{"given":"Takashi","family":"Kawamoto","sequence":"first","affiliation":[]},{"given":"Kazuhiro","family":"Ueda","sequence":"additional","affiliation":[]},{"given":"Takayuki","family":"Noto","sequence":"additional","affiliation":[]}],"member":"311","published-online":{"date-parts":[[2012,1,23]]},"reference":[{"key":"e_1_2_6_1_2","unstructured":"MoonY. AhnG. ChoiH. KimN. andShimD. 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