{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,31]],"date-time":"2025-12-31T07:59:25Z","timestamp":1767167965723,"version":"build-2238731810"},"reference-count":4,"publisher":"Wiley","license":[{"start":{"date-parts":[[2013,5,9]],"date-time":"2013-05-09T00:00:00Z","timestamp":1368057600000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["VLSI Design"],"published-print":{"date-parts":[[2013,5,9]]},"abstract":"<jats:p>\n                    In this paper, a high-accuracy programmable timing generator with wide-range tuning capability is proposed. With the aid of dual delay-locked loop (DLL), both of the coarse- and fine-tuning mechanisms are operated in precise closed-loop scheme to lessen the effects of the ambient variations. The timing generator can provide sub-gate resolution and instantaneous switching capability. The circuit is implemented and simulated in TSMC 0.18\u2009\n                    <jats:italic>\u03bc<\/jats:italic>\n                    m 1P6M technology. The test chip area occupies 1.9\u2009mm\n                    <jats:sup>2<\/jats:sup>\n                    . The reference clock cycle can be divided into 128 bins by interpolation to obtain 14\u2009ps resolution with the clock rate at 550\u2009MHz. The INL and DNL are within \u22120.21\n                    <jats:italic>~<\/jats:italic>\n                    +0.78 and \u22120.27\n                    <jats:italic>~<\/jats:italic>\n                    +0.43 LSB, respectively.\n                  <\/jats:p>","DOI":"10.1155\/2013\/803616","type":"journal-article","created":{"date-parts":[[2013,5,9]],"date-time":"2013-05-09T17:04:12Z","timestamp":1368119052000},"page":"1-6","source":"Crossref","is-referenced-by-count":1,"title":["High-Accuracy Programmable Timing Generator with Wide-Range Tuning Capability"],"prefix":"10.1155","volume":"2013","author":[{"given":"Ting-Li","family":"Chu","sequence":"first","affiliation":[{"name":"Department of Electrical Engineering, National Yunlin University of Science and Technology, No. 123, Section 3, University Road, Douliou, Yunlin County 64002, Taiwan"}]},{"given":"Sin-Hong","family":"Yu","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, National Yunlin University of Science and Technology, No. 123, Section 3, University Road, Douliou, Yunlin County 64002, Taiwan"}]},{"given":"Chorng-Sii","family":"Hwang","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, National Yunlin University of Science and Technology, No. 123, Section 3, University Road, Douliou, Yunlin County 64002, Taiwan"}]}],"member":"311","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/23.467797"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/4.508208"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2006.869905"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2007.894413"}],"updated-by":[{"DOI":"10.1155\/2017\/6898916","type":"corrigendum","label":"Corrigendum","source":"publisher","updated":{"date-parts":[[2017,11,22]],"date-time":"2017-11-22T00:00:00Z","timestamp":1511308800000}}],"container-title":["VLSI Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/archive\/2013\/803616.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/downloads.hindawi.com\/archive\/2013\/803616.xml","content-type":"application\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/downloads.hindawi.com\/archive\/2013\/803616.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,12,10]],"date-time":"2020-12-10T10:13:50Z","timestamp":1607595230000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.hindawi.com\/journals\/vlsi\/2013\/803616\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,5,9]]},"references-count":4,"alternative-id":["803616","803616"],"URL":"https:\/\/doi.org\/10.1155\/2013\/803616","relation":{},"ISSN":["1065-514X","1563-5171"],"issn-type":[{"value":"1065-514X","type":"print"},{"value":"1563-5171","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,5,9]]}}}