{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,28]],"date-time":"2025-10-28T10:46:06Z","timestamp":1761648366186,"version":"3.37.3"},"reference-count":23,"publisher":"Wiley","license":[{"start":{"date-parts":[[2016,1,1]],"date-time":"2016-01-01T00:00:00Z","timestamp":1451606400000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"funder":[{"DOI":"10.13039\/501100001592","name":"Higher Education Authority","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100001592","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["International Journal of Reconfigurable Computing"],"published-print":{"date-parts":[[2016]]},"abstract":"<jats:p>The higher computational complexity of an elliptic curve scalar point multiplication operation limits its implementation on general purpose processors. Dedicated hardware architectures are essential to reduce the computational time, which results in a substantial increase in the performance of associated cryptographic protocols. This paper presents a unified architecture to compute modular addition, subtraction, and multiplication operations over a finite field of large prime characteristic<mml:math xmlns:mml=\"http:\/\/www.w3.org\/1998\/Math\/MathML\" id=\"M1\"><mml:mi mathvariant=\"normal\">G<\/mml:mi><mml:mi mathvariant=\"normal\">F<\/mml:mi><mml:mo stretchy=\"false\">(<\/mml:mo><mml:mi>p<\/mml:mi><mml:mo stretchy=\"false\">)<\/mml:mo><\/mml:math>. Subsequently, dual instances of the unified architecture are utilized in the design of high speed elliptic curve scalar multiplier architecture. The proposed architecture is synthesized and implemented on several different Xilinx FPGA platforms for different field sizes. The proposed design computes a 192-bit elliptic curve scalar multiplication in 2.3\u2009ms on Virtex-4 FPGA platform. It is 34<mml:math xmlns:mml=\"http:\/\/www.w3.org\/1998\/Math\/MathML\" id=\"M2\"><mml:mrow><mml:mi mathvariant=\"normal\">%<\/mml:mi><\/mml:mrow><\/mml:math>faster and requires 40<mml:math xmlns:mml=\"http:\/\/www.w3.org\/1998\/Math\/MathML\" id=\"M3\"><mml:mrow><mml:mi mathvariant=\"normal\">%<\/mml:mi><\/mml:mrow><\/mml:math>fewer clock cycles for elliptic curve scalar multiplication and consumes considerable fewer FPGA slices as compared to the other existing designs. The proposed design is also resistant to the timing and simple power analysis (SPA) attacks; therefore it is a good choice in the construction of fast and secure elliptic curve based cryptographic protocols.<\/jats:p>","DOI":"10.1155\/2016\/6371403","type":"journal-article","created":{"date-parts":[[2016,7,10]],"date-time":"2016-07-10T17:00:46Z","timestamp":1468170046000},"page":"1-10","source":"Crossref","is-referenced-by-count":28,"title":["FPGA Based High Speed SPA Resistant Elliptic Curve Scalar Multiplier Architecture"],"prefix":"10.1155","volume":"2016","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-4645-4043","authenticated-orcid":true,"given":"Khalid","family":"Javeed","sequence":"first","affiliation":[{"name":"Electrical Engineering Department, COMSATS Institute of Information Technology, Abbottabad, Pakistan"},{"name":"School of Electronic Engineering, Dublin City University, Dublin, Ireland"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xiaojun","family":"Wang","sequence":"additional","affiliation":[{"name":"School of Electronic Engineering, Dublin City University, Dublin, Ireland"},{"name":"School of Computer & Software, Nanjing University of Information Science and Technology, Nanjing, Jiangsu, China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"311","reference":[{"key":"25","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-39799-x_31"},{"key":"19","doi-asserted-by":"publisher","DOI":"10.2307\/2007884"},{"key":"31","doi-asserted-by":"publisher","DOI":"10.1145\/359340.359342"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-68697-5_9"},{"key":"35","doi-asserted-by":"publisher","DOI":"10.1007\/978-0-387-71829-3_2"},{"first-page":"265","volume-title":"An updated survey on secure ECC implementations: attacks, countermeasures and cost","year":"2012","key":"9"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1504\/ijes.2008.022395"},{"key":"26","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-44499-8_2"},{"key":"27","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"crossref","first-page":"41","DOI":"10.1007\/3-540-44499-8_3","volume-title":"A high performance reconfigurable elliptic curve processor for GF (2m)","volume":"1965","year":"2000"},{"key":"24","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2006.09.002"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/tvlsi.2009.2019415"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2006.889459"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2004.03.006"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/tcsi.2010.2103190"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1016\/j.compeleceng.2008.06.009"},{"key":"28","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-44709-1_29"},{"key":"30","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-28632-5_7"},{"key":"33","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2003.1190586"},{"issue":"5","key":"14","first-page":"497","volume":"32","year":"1983","journal-title":"IEEE Transactions on Computers"},{"year":"2004","key":"15"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1007\/s10617-008-9021-3"},{"key":"22","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2006.880184"},{"first-page":"786","volume-title":"Fast modular division for application in ECC on reconfigurable logic","year":"2003","key":"4"}],"container-title":["International Journal of Reconfigurable Computing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/journals\/ijrc\/2016\/6371403.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/downloads.hindawi.com\/journals\/ijrc\/2016\/6371403.xml","content-type":"application\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/downloads.hindawi.com\/journals\/ijrc\/2016\/6371403.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,24]],"date-time":"2017-06-24T14:09:35Z","timestamp":1498313375000},"score":1,"resource":{"primary":{"URL":"http:\/\/www.hindawi.com\/journals\/ijrc\/2016\/6371403\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016]]},"references-count":23,"alternative-id":["6371403","6371403"],"URL":"https:\/\/doi.org\/10.1155\/2016\/6371403","relation":{},"ISSN":["1687-7195","1687-7209"],"issn-type":[{"type":"print","value":"1687-7195"},{"type":"electronic","value":"1687-7209"}],"subject":[],"published":{"date-parts":[[2016]]}}}