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A memristive diode bridge cascaded with a fractional\u2010order RL filter constitutes the generalized fractional\u2010order memristor. The mathematical model of the proposed fractional\u2010order chaotic circuit is established by extending the nonlinear capacitor and inductor in the memristive chaotic circuit to the fractional order. Detailed theoretical analysis and numerical simulations are carried out on the dynamic behavior of the proposed circuit by investigating the stability of equilibrium points and the influence of circuit parameters on bifurcations. The results show that the order of the fractional\u2010order circuit has a great influence on the dynamical behavior of the system. The system may exhibit complicated nonlinear dynamic behavior such as bifurcation and chaos with the change of the order. The equivalent circuits of the fractional\u2010order inductor and capacitor are also given in the paper, and the parameters of the equivalent circuits are solved by an undetermined coefficient method. Circuit simulations of the equivalent fractional\u2010order memristive chaotic circuit are carried out in order to validate the correctness of numerical simulations and the practicability of using the integer\u2010order equivalent circuit to substitute the fractional\u2010order element.<\/jats:p>","DOI":"10.1155\/2018\/9467435","type":"journal-article","created":{"date-parts":[[2018,12,2]],"date-time":"2018-12-02T23:35:10Z","timestamp":1543793710000},"update-policy":"https:\/\/doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":10,"title":["Dynamic Behaviors and the Equivalent Realization of a Novel Fractional\u2010Order Memristor\u2010Based Chaotic Circuit"],"prefix":"10.1155","volume":"2018","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-7219-484X","authenticated-orcid":false,"given":"Ningning","family":"Yang","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4782-8350","authenticated-orcid":false,"given":"Cheng","family":"Xu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3644-4354","authenticated-orcid":false,"given":"Chaojun","family":"Wu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3497-6506","authenticated-orcid":false,"given":"Rong","family":"Jia","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chongxin","family":"Liu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"311","published-online":{"date-parts":[[2018,12,2]]},"reference":[{"key":"e_1_2_9_1_2","doi-asserted-by":"publisher","DOI":"10.1109\/TCT.1971.1083337"},{"key":"e_1_2_9_2_2","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2009.2021077"},{"key":"e_1_2_9_3_2","doi-asserted-by":"publisher","DOI":"10.1109\/MPOT.2012.2216298"},{"key":"e_1_2_9_4_2","doi-asserted-by":"publisher","DOI":"10.1016\/j.mssp.2015.03.015"},{"key":"e_1_2_9_5_2","article-title":"Memristor-based resistive random access memory: hybrid architecture for low power compact memory design","volume":"4","author":"Thangamani V.","year":"2014","journal-title":"Control Theory & Informatics"},{"key":"e_1_2_9_6_2","doi-asserted-by":"publisher","DOI":"10.1088\/0022-3727\/46\/9\/093001"},{"key":"e_1_2_9_7_2","doi-asserted-by":"publisher","DOI":"10.1007\/s00521-015-1899-7"},{"key":"e_1_2_9_8_2","doi-asserted-by":"publisher","DOI":"10.1002\/cplx.21482"},{"key":"e_1_2_9_9_2","first-page":"11","volume-title":"International ICST Conference","author":"Mouttet B.","year":"2008"},{"key":"e_1_2_9_10_2","doi-asserted-by":"publisher","DOI":"10.1016\/j.cnsns.2012.06.011"},{"key":"e_1_2_9_11_2","doi-asserted-by":"crossref","unstructured":"SheridanP. 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