{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,18]],"date-time":"2025-10-18T10:55:35Z","timestamp":1760784935648,"version":"3.40.5"},"reference-count":40,"publisher":"Wiley","license":[{"start":{"date-parts":[[2020,12,10]],"date-time":"2020-12-10T00:00:00Z","timestamp":1607558400000},"content-version":"unspecified","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Journal of Computer Networks and Communications"],"published-print":{"date-parts":[[2020,12,10]]},"abstract":"<jats:p>While THz wireless network-on-chip (WiNoC) introduces considerably high bandwidth, due to the high path loss, it cannot be used for communication between far apart nodes, especially in a multichip architecture. In this paper, we introduce a cellular and scalable architecture to reuse the frequencies of the chips. Moreover, we use a novel structure called parallel-plate waveguide (PPW) that is suitable for interchip communication. The low-loss property of this waveguide lets us increase the number of chips. Each chip has a wireless node as a gateway for communicating with other chips. To shorten the length of intra- and interchip THz links, the optimum configuration is determined by leveraging the multiobjective simulating annealing (SA) algorithm. Finally, we compare the performance of the proposed THz multichip NoC with a conventional millimeter-wave one. Our simulation results indicate that when the system scales up from four to sixteen chips, the throughput of our design is decreased about <jats:inline-formula>\n                     <a:math xmlns:a=\"http:\/\/www.w3.org\/1998\/Math\/MathML\" id=\"M1\">\n                        <a:mn>5.8<\/a:mn>\n                        <a:mo>%<\/a:mo>\n                     <\/a:math>\n                  <\/jats:inline-formula>, while for millimeter-wave NoC, this reduction is about <jats:inline-formula>\n                     <c:math xmlns:c=\"http:\/\/www.w3.org\/1998\/Math\/MathML\" id=\"M2\">\n                        <c:mn>21<\/c:mn>\n                        <c:mo>%<\/c:mo>\n                     <\/c:math>\n                  <\/jats:inline-formula>. Furthermore, the average latency growth of our system is only <jats:inline-formula>\n                     <e:math xmlns:e=\"http:\/\/www.w3.org\/1998\/Math\/MathML\" id=\"M3\">\n                        <e:mn>1<\/e:mn>\n                        <e:mo>%<\/e:mo>\n                     <\/e:math>\n                  <\/jats:inline-formula> compared with about <jats:inline-formula>\n                     <g:math xmlns:g=\"http:\/\/www.w3.org\/1998\/Math\/MathML\" id=\"M4\">\n                        <g:mn>40<\/g:mn>\n                        <g:mo>%<\/g:mo>\n                     <\/g:math>\n                  <\/jats:inline-formula> increase for the millimeter-wave NoC.<\/jats:p>","DOI":"10.1155\/2020\/8823938","type":"journal-article","created":{"date-parts":[[2020,12,11]],"date-time":"2020-12-11T17:08:48Z","timestamp":1607706528000},"page":"1-15","source":"Crossref","is-referenced-by-count":1,"title":["Scalable THz Network-On-Chip Architecture for Multichip Systems"],"prefix":"10.1155","volume":"2020","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-5418-2490","authenticated-orcid":true,"given":"Esmaeel","family":"Tahanian","sequence":"first","affiliation":[{"name":"Faculty of Computer Engineering, Shahrood University of Technology, Shahrood, Iran"}]},{"given":"Alireza","family":"Tajary","sequence":"additional","affiliation":[{"name":"Faculty of Computer Engineering, Shahrood University of Technology, Shahrood, Iran"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1172-1941","authenticated-orcid":true,"given":"Mohsen","family":"Rezvani","sequence":"additional","affiliation":[{"name":"Faculty of Computer Engineering, Shahrood University of Technology, Shahrood, Iran"}]},{"given":"Mansoor","family":"Fateh","sequence":"additional","affiliation":[{"name":"Faculty of Computer Engineering, Shahrood University of Technology, Shahrood, Iran"}]}],"member":"311","reference":[{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/2.976921"},{"issue":"5","key":"2","doi-asserted-by":"crossref","first-page":"371","DOI":"10.1016\/S1359-0286(02)00116-X","article-title":"The international technology roadmap for semiconductors\u2014perspectives and challenges for the next 15 years","volume":"6","author":"W. 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