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Because the power optimization for mixed polarity Reed\u2013Muller (MPRM) circuits is a combinatorial optimization problem, in this paper, we first propose a multilevel adaptive memetic algorithm (MAMA), which includes global exploration optimizer, local heuristic optimizer, and initial population optimizer. We use the proposed differential evolution optimization, simulated annealing optimization, and data matching algorithm to make the population evolve. Moreover, based on the proposed matrix decomposition strategy and parallel polarity conversion algorithm, we propose a power optimization approach (POA) for MPRM circuits, which searches for an MPRM circuit with a minimum power using the MAMA. Experimental results demonstrated the effectiveness and superiority of the POA in optimizing the power of MPRM circuits.<\/jats:p>","DOI":"10.1155\/2023\/3510001","type":"journal-article","created":{"date-parts":[[2023,3,7]],"date-time":"2023-03-07T03:05:47Z","timestamp":1678158347000},"update-policy":"https:\/\/doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Power Optimization for Mixed Polarity Reed\u2013Muller Circuits Based on Multilevel Adaptive Memetic Algorithm"],"prefix":"10.1155","volume":"2023","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-6460-7480","authenticated-orcid":false,"given":"Yuhao","family":"Zhou","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7041-8582","authenticated-orcid":false,"given":"Zhenxue","family":"He","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9884-8768","authenticated-orcid":false,"given":"Yan","family":"Zhang","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9242-5281","authenticated-orcid":false,"given":"Jia","family":"Liu","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0136-4853","authenticated-orcid":false,"given":"Tao","family":"Wang","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9806-5851","authenticated-orcid":false,"given":"Limin","family":"Xiao","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3063-4368","authenticated-orcid":false,"given":"Xiang","family":"Wang","sequence":"additional","affiliation":[]}],"member":"311","published-online":{"date-parts":[[2023,3,6]]},"reference":[{"key":"e_1_2_12_1_2","doi-asserted-by":"publisher","DOI":"10.52866\/ijcsm.2020.01.02.005"},{"key":"e_1_2_12_2_2","doi-asserted-by":"publisher","DOI":"10.5121\/vlsic.2013.4305"},{"key":"e_1_2_12_3_2","first-page":"940","article-title":"Low power 3-input AND\/XOR gate design","volume":"27","author":"Liang H.","year":"2015","journal-title":"J Comput-Aided Des Comput Graphics"},{"key":"e_1_2_12_4_2","doi-asserted-by":"crossref","unstructured":"WangX. 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