{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,18]],"date-time":"2026-03-18T00:31:45Z","timestamp":1773793905823,"version":"3.50.1"},"reference-count":29,"publisher":"Wiley","issue":"1","license":[{"start":{"date-parts":[[2025,9,30]],"date-time":"2025-09-30T00:00:00Z","timestamp":1759190400000},"content-version":"vor","delay-in-days":272,"URL":"http:\/\/creativecommons.org\/licenses\/by\/4.0\/"},{"start":{"date-parts":[[2025,1,1]],"date-time":"2025-01-01T00:00:00Z","timestamp":1735689600000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/doi.wiley.com\/10.1002\/tdm_license_1.1"}],"content-domain":{"domain":["onlinelibrary.wiley.com"],"crossmark-restriction":true},"short-container-title":["Journal of Electrical and Computer Engineering"],"published-print":{"date-parts":[[2025,1]]},"abstract":"<jats:p>Physical Downlink Shared Channel (PDSCH) in 5G New Radio (NR) uses LDPC codes as the channel coding solution for their efficient error\u2010correcting performance and suitability for high\u2010speed communications. To meet the high\u2010throughput requirements of the 5G NR technology, this paper discusses different 5G NR LDPC encoder architectures that enable different parallel encoding schemes and optimizes the design for specific metrics. The recent architectural designs might lack effective design metrics that ensure high throughput, low area and gate counts, and full compatibility with the 5G NR standard. The suggested architecture aims to a generic design with flexible controller that is fully compatible with all the supported code block sizes and code rates in the 5G NR standard. The design is implemented in ASIC using NanGate\u201015\u2009nm standard cells CMOS technology with The Cadence Genus synthesis solution. The proposed architecture targets high\u2010throughput encoding operations with a low\u2010area hardware design. The synthesis of the suggested encoder resulted in a maximum frequency of 1.71\u2009GHz and gate counts of 491.8\u2009K gates with all the code block sizes and code rates in 5G NR standard supported. For the largest code length, the proposed architecture\u2019s throughput is up to 451.44\u2009Gbps. Among the discussed previous works, there is one that targets a very high throughput of 257.9\u2009Gbps but implemented using very high gate counts of 1126\u2009K gates for only one code\u2010word size (25344, 8448). This previous work implements encoding operation in a sub\u2010matrix\u2010by\u2010sub\u2010matrix encoding scheme. To balance between gate counts and throughput, another previous encoder architecture work, designed for only one code\u2010word size (23232, 7744), achieved a relatively high throughput of 202.4\u2009Gbps and gate counts of 486.4\u2009K gates. This architecture conducts parallel encoding operation in a row\u2010by\u2010row scheme. The results confirmed that the proposed architecture achieves suitable balance between high throughput, gate counts, and 5G NR compatibility compared to the previous works. The postsynthesis results showed a throughput improvement of 123% and 75.04% compared to row\u2010by\u2010row and submatrix\u2010based schemes, respectively. They also show a gate count reduction of 56% and 23.1% compared to submatrix\u2010based and column\u2010based schemes, respectively.<\/jats:p>","DOI":"10.1155\/jece\/1104969","type":"journal-article","created":{"date-parts":[[2025,9,30]],"date-time":"2025-09-30T08:25:29Z","timestamp":1759220729000},"update-policy":"https:\/\/doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Generic 5G NR LDPC Encoder Architecture Optimized for Area and Throughput"],"prefix":"10.1155","volume":"2025","author":[{"ORCID":"https:\/\/orcid.org\/0009-0002-0868-872X","authenticated-orcid":false,"given":"Muhammed","family":"Tarek","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0009-0007-7853-0094","authenticated-orcid":false,"given":"Eman","family":"Mohamed","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0009-0006-7764-4359","authenticated-orcid":false,"given":"Shaimaa","family":"ElSayed","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6693-7619","authenticated-orcid":false,"given":"Nahla","family":"Elashkar","sequence":"additional","affiliation":[]}],"member":"311","published-online":{"date-parts":[[2025,9,30]]},"reference":[{"key":"e_1_2_13_1_2","unstructured":"GPP Technical Specification Group Radio Access Network; NR; Physical Layer Procedures 2021 https:\/\/portal.3gpp.org\/desktopmodules\/Specifications\/SpecificationDetails.aspx?specificationId%3d;2440."},{"key":"e_1_2_13_2_2","doi-asserted-by":"publisher","DOI":"10.1109\/18.748992"},{"key":"e_1_2_13_3_2","doi-asserted-by":"publisher","DOI":"10.1109\/18.910578"},{"key":"e_1_2_13_4_2","first-page":"20880","article-title":"Low-Complexity High-Performance Low-Density Parity-Check Encoder Design for China Digital Radio Standard","volume":"5","author":"Chen D.","year":"2017","journal-title":"IEEE Access"},{"key":"e_1_2_13_5_2","doi-asserted-by":"crossref","unstructured":"LazarenkoA. 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