{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,3]],"date-time":"2025-03-03T05:34:30Z","timestamp":1740980070184,"version":"3.38.0"},"reference-count":5,"publisher":"SAGE Publications","issue":"2","license":[{"start":{"date-parts":[[1993,2,1]],"date-time":"1993-02-01T00:00:00Z","timestamp":728524800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/journals.sagepub.com\/page\/policies\/text-and-data-mining-license"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["SIMULATION"],"published-print":{"date-parts":[[1993,2]]},"abstract":"<jats:p> As the limits of sequential processing are being approached, the use of parallel architectures in the implementation of modern scientific computer systems grows in importance. The use of advanced and powerful microprocessors in these systems is a particularly effective approach. However, the costs associated with such systems make it critical to be able to forecast system behavior before an actual hardware proto type is constructed, in terms of such requirements as real-time performance, throughput, bandwidth, latency, reliability, availability, etc. Experience with the design and simulation of a new parallel computer is used as an example to illustrate a technique by which requirements can be accurately analyzed without the risk of premature hardware implementution. Using processor libraries, the complexities of the actual system are portrayed in the form of a software-based prototype system which provides significantly more accuracy than traditional simulation methods. <\/jats:p>","DOI":"10.1177\/003754979306000207","type":"journal-article","created":{"date-parts":[[2008,3,29]],"date-time":"2008-03-29T17:23:43Z","timestamp":1206811423000},"page":"129-134","source":"Crossref","is-referenced-by-count":3,"title":["Simulating Microprocessor-Based Parallel Computers Using Processor Libraries"],"prefix":"10.1177","volume":"60","author":[{"given":"Alan D.","family":"George","sequence":"first","affiliation":[{"name":"Department of Electrical Engineering Florida A&M University and Florida State University Tallahassee, FL 32316"}]}],"member":"179","published-online":{"date-parts":[[1993,2,1]]},"reference":[{"volume-title":"DSP96002 IEEE Floating-Point Dual-Port Processor User's Manual","year":"1989","key":"atypb1"},{"volume-title":"ANSI\/IEEE Standard 754-1985: IEEE Standard for Binary Floating-Point Arithmetic","year":"1985","key":"atypb2"},{"volume-title":"Proceedings of the IEEE International Conference on ASSP, May","author":"K. Kloker","key":"atypb3"},{"volume-title":"Motorola DSP96002 Digital Signal Processor Simulator Reference Manual","year":"1989","key":"atypb4"},{"volume-title":"A Fault-Tolerant Computing System for Digital Signal Processing","year":"1991","author":"A.D. George","key":"atypb5"}],"container-title":["SIMULATION"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/journals.sagepub.com\/doi\/pdf\/10.1177\/003754979306000207","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/journals.sagepub.com\/doi\/pdf\/10.1177\/003754979306000207","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,3,2]],"date-time":"2025-03-02T09:54:36Z","timestamp":1740909276000},"score":1,"resource":{"primary":{"URL":"https:\/\/journals.sagepub.com\/doi\/10.1177\/003754979306000207"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1993,2]]},"references-count":5,"journal-issue":{"issue":"2","published-print":{"date-parts":[[1993,2]]}},"alternative-id":["10.1177\/003754979306000207"],"URL":"https:\/\/doi.org\/10.1177\/003754979306000207","relation":{},"ISSN":["0037-5497","1741-3133"],"issn-type":[{"type":"print","value":"0037-5497"},{"type":"electronic","value":"1741-3133"}],"subject":[],"published":{"date-parts":[[1993,2]]}}}