{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,1,28]],"date-time":"2025-01-28T05:43:42Z","timestamp":1738043022879,"version":"3.33.0"},"reference-count":31,"publisher":"SAGE Publications","issue":"4","license":[{"start":{"date-parts":[[1997,4,1]],"date-time":"1997-04-01T00:00:00Z","timestamp":859852800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/journals.sagepub.com\/page\/policies\/text-and-data-mining-license"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["SIMULATION"],"published-print":{"date-parts":[[1997,4]]},"abstract":"<jats:p> Multithreaded architectures are widely used for, among other things, hiding long memory latency. In such an architecture, a number of threads are allocated to each Processing Element (PE), and whenever a running thread becomes suspended, the PE switches to the next ready thread. We have developed a simulation platform, MTASim, that can be used to test and evaluate various policies and parameters of a multithreaded computer. The most important features of the MTASim are its flexibility and its ease of use. The MTASim model is based on finite state machines and can be easily modified and expanded. The simulation platform includes an experimental planner, an interface to PVM for the execution of independent experiments in parallel, and an interface to Matlab for processing and displaying results. The MTASim has been used to, among other things, determine the optimal number of threads and to evaluate various prefetching strategies and thread replacement algorithms. <\/jats:p>","DOI":"10.1177\/003754979706800403","type":"journal-article","created":{"date-parts":[[2007,3,18]],"date-time":"2007-03-18T07:46:49Z","timestamp":1174204009000},"page":"219-230","source":"Crossref","is-referenced-by-count":2,"title":["Modeling and Simulation of Multithreaded Architectures"],"prefix":"10.1177","volume":"68","author":[{"given":"Vladimir","family":"Vlassov","sequence":"first","affiliation":[{"name":"Department of Teleinformatics Royal Institute of Technology (KTH) Stockholm, Sweden"}]},{"given":"Rassul","family":"Ayani","sequence":"additional","affiliation":[{"name":"Department of Teleinformatics Royal Institute of Technology (KTH) Stockholm, Sweden"}]},{"given":"Lars-Erik","family":"Thorelli","sequence":"additional","affiliation":[{"name":"Department of Teleinformatics Royal Institute of Technology (KTH) Stockholm, Sweden"}]}],"member":"179","published-online":{"date-parts":[[1997,4,1]]},"reference":[{"volume-title":"Advanced Computer Architecture: Parallelism, Scalability, Programmability","year":"1993","author":"Hwang, K.","key":"atypb1"},{"key":"atypb2","doi-asserted-by":"publisher","DOI":"10.1109\/40.216748"},{"volume-title":"Proc. the 19th Ann. Int. Symp. on Comp. Architecture (ISCA'92)","author":"Boothe, B.","key":"atypb3"},{"volume-title":"Proc. of the 18th Ann. Int. Symp. on Comp. Architecture (ISCA'91)","author":"Gupta, A.","key":"atypb4"},{"key":"atypb5","first-page":"241","volume":"298","author":"Smith, B.J.","year":"1981","journal-title":"SPIE"},{"volume-title":"Proc. the 17th Ann. Int. Symp. on Comp. Architecture (ISCA'90)","author":"Papadopoulos, G.M.","key":"atypb6"},{"volume-title":"Proc. the 28th Ann. Int. Symp. on Microarchitecture","author":"Fillo, M.","key":"atypb7"},{"volume-title":"On-Line Library","author":"Tera Computer Co.","key":"atypb8"},{"key":"atypb9","doi-asserted-by":"publisher","DOI":"10.1109\/71.159037"},{"volume-title":"Proc. the 22nd Ann. Int. Symp. on Comp. Architecture (ISCA'95), June","author":"Agarwal, A.","key":"atypb10"},{"volume-title":"Proc. the 19th Ann. Int. Symp. on Comp. Architecture (ISCA'92)","author":"Nikhil, R.S.","key":"atypb11"},{"volume-title":"Proc. 2nd Ann. ACM Symp. on Parallel Algorithms and Architectures","author":"Saavedra-Barrera, R.H.","key":"atypb12"},{"volume-title":"Proc. of the 16th Ann. Int. Symp. on Comp. Architecture (ISCA'89)","author":"Weber, W.-D.","key":"atypb13"},{"volume-title":"Proc. of the 1st Int. EURO-PAR Conf","author":"Maquelin, O.C.","key":"atypb14"},{"volume-title":"Proc. of the Workshop on Parallel Programming and Computation (ZEUS '95)","author":"Giloi, W.K.","key":"atypb15"},{"volume-title":"An Analytical Solution for a Markov Chain Modeling Multithreaded Execution","year":"1991","author":"Saavedra-Barrera, R.H.","key":"atypb16"},{"volume-title":"Proc. of the 2nd Int. Euro-Par Conf.: Euro-Par'96. Parallel Processing","author":"Vlassov, V.","key":"atypb17"},{"volume-title":"Proc. of the 4th Int. Workshop on Modeling, Analysis and Simulation of Computer and Telecom. Systems (MASCOTS'96). February","author":"Nemawarkar, S.S.","key":"atypb18"},{"volume-title":"Proc. the 5th Int. Symp. on Parallel and Distr. Processing (SPDP)","author":"Nemawarkar, S.S.","key":"atypb19"},{"volume-title":"Proc. of the ACM Sigmetrics Conf. on Measurement and Modeling of Computer Systems, May","author":"Goldschmidt, R.","key":"atypb20"},{"key":"atypb21","doi-asserted-by":"publisher","DOI":"10.1177\/003754979406300201"},{"volume-title":"Proc. Int. Symp. on Shared Memory Multiprocessing. April","author":"Kurihara, K.","key":"atypb22"},{"volume-title":"Proc. the 17th Ann. Int. Symp. on Comp. Architecture (ISCA'90). June","author":"Agarwal, A.","key":"atypb23"},{"volume-title":"Proc. of the 4th Int. Conf. on Computing and Information (ICCI)","author":"Nemawarkar, S.S.","key":"atypb24"},{"volume-title":"Proc. of the 4th Symposium on Principles and Practices of Parallel Programming. May","author":"Kranz, D.","key":"atypb25"},{"volume-title":"Proc. of the 5th Int. Conf. on Architectural Support for Programming Languages and Operation Systems","author":"Chen, T.-F.","key":"atypb26"},{"volume-title":"Data Prefetching for High-Performance Processors","year":"1993","author":"Chen, T.-F.","key":"atypb27"},{"volume-title":"MATLAB User's Guide","year":"1994","key":"atypb28"},{"key":"atypb29","doi-asserted-by":"publisher","DOI":"10.7551\/mitpress\/5712.001.0001"},{"volume-title":"Open Windows Developer's Guide 3.0.1. User's Guide","year":"1993","key":"atypb30"},{"volume-title":"The Art of Computer Systems Performance Analysis","year":"1991","author":"Jain, R.","key":"atypb31"}],"container-title":["SIMULATION"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/journals.sagepub.com\/doi\/pdf\/10.1177\/003754979706800403","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/journals.sagepub.com\/doi\/pdf\/10.1177\/003754979706800403","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,27]],"date-time":"2025-01-27T19:56:28Z","timestamp":1738007788000},"score":1,"resource":{"primary":{"URL":"https:\/\/journals.sagepub.com\/doi\/10.1177\/003754979706800403"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1997,4]]},"references-count":31,"journal-issue":{"issue":"4","published-print":{"date-parts":[[1997,4]]}},"alternative-id":["10.1177\/003754979706800403"],"URL":"https:\/\/doi.org\/10.1177\/003754979706800403","relation":{},"ISSN":["0037-5497","1741-3133"],"issn-type":[{"type":"print","value":"0037-5497"},{"type":"electronic","value":"1741-3133"}],"subject":[],"published":{"date-parts":[[1997,4]]}}}