{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,1]],"date-time":"2026-05-01T23:00:42Z","timestamp":1777676442754,"version":"3.51.4"},"reference-count":16,"publisher":"SAGE Publications","issue":"2","license":[{"start":{"date-parts":[[2010,6,1]],"date-time":"2010-06-01T00:00:00Z","timestamp":1275350400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/journals.sagepub.com\/page\/policies\/text-and-data-mining-license"}],"content-domain":{"domain":["journals.sagepub.com"],"crossmark-restriction":true},"short-container-title":["The International Journal of High Performance Computing Applications"],"published-print":{"date-parts":[[2011,5]]},"abstract":"<jats:p>Cell Superscalar (CellSs) provides a simple, flexible and easy programming approach for the Cell Broadband Engine (Cell\/B.E.) that automatically exploits the inherent concurrency of applications at a function or task level. The CellSs environment is based on a source-to-source compiler that translates annotated C or Fortran code and a runtime library tailored for the Cell\/B.E. that orchestrates the concurrent execution of the application. We introduce a technique called bypassing that allows CellSs to perform core-to-core Direct Memory Access (DMA) transfers for generic applications. In this review we concisely summarize the bypassing practice and introduce two improvements: just-in-time renaming and lazy write-back. These extensions come at no additional cost and potentially increase performance by improving the perceived bandwidth of the Element Interconnect Bus (EIB). Experiments on five fundamental linear algebra kernels demonstrate the applicability of these techniques and quantify the benefit that can be reaped. We also present performance results for a first prototype of CellSs with bypassing.<\/jats:p>","DOI":"10.1177\/1094342010369115","type":"journal-article","created":{"date-parts":[[2010,6,1]],"date-time":"2010-06-01T20:26:06Z","timestamp":1275423966000},"page":"137-147","update-policy":"https:\/\/doi.org\/10.1177\/sage-journals-update-policy","source":"Crossref","is-referenced-by-count":3,"title":["Making the Best of Temporal Locality: Just-in-Time Renaming and Lazy Write-Back on the Cell\/B.E"],"prefix":"10.1177","volume":"25","author":[{"given":"Pieter","family":"Bellens","sequence":"first","affiliation":[{"name":"Barcelona Supercomputing Center, Centro Nacional De Supercomputaci\u00f3n, Barcelona, Spain,"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Josep M.","family":"Perez","sequence":"additional","affiliation":[{"name":"Barcelona Supercomputing Center, Centro Nacional De Supercomputaci\u00f3n, Barcelona, Spain"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rosa M.","family":"Badia","sequence":"additional","affiliation":[{"name":"Barcelona Supercomputing Center, Centro Nacional De Supercomputaci\u00f3n, Barcelona, Spain, Consejo Superior De Investigaciones Cientificas, Barcelona, Spain"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jesus","family":"Labarta","sequence":"additional","affiliation":[{"name":"Barcelona Supercomputing Center, Centro Nacional De Supercomputaci\u00f3n, Barcelona, Spain, Universitat Politecnica De Catalunya, Barcelona, Spain"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"179","published-online":{"date-parts":[[2010,6,1]]},"reference":[{"key":"atypb1","volume-title":"Proceedings of the First International Symposium on Networks-on-Chip","author":"Ainsworth, T."},{"key":"atypb2","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.4378779"},{"key":"atypb3","doi-asserted-by":"publisher","DOI":"10.1016\/j.parco.2007.09.005"},{"key":"atypb4","doi-asserted-by":"crossref","unstructured":"Blagojevic, F., Nikolopoulos, D.S., Stamatakis, A. and Antonopoulos, C.D. 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