{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,9,29]],"date-time":"2026-09-29T01:43:27Z","timestamp":1790646207423,"version":"4.1.0"},"reference-count":19,"publisher":"SAGE Publications","issue":"6","license":[{"start":{"date-parts":[[2019,7,2]],"date-time":"2019-07-02T00:00:00Z","timestamp":1562025600000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/journals.sagepub.com\/page\/policies\/text-and-data-mining-license"}],"content-domain":{"domain":["journals.sagepub.com"],"crossmark-restriction":true},"short-container-title":["The International Journal of High Performance Computing Applications"],"published-print":{"date-parts":[[2019,11]]},"abstract":"<jats:p>To amortize the cost of MPI collective operations, nonblocking collectives have been proposed so as to allow communications to be overlapped with computation. Unfortunately, collective communications are more CPU-hungry than point-to-point communications and running them in a communication thread on a dedicated CPU core makes them slow. On the other hand, running collective communications on the application cores leads to no overlap. In this article, we propose placement algorithms for progress threads that do not degrade performance when running on cores dedicated to communications to get communication\/computation overlap. We first show that even simple collective operations, such as those based on a chain topology, are not straightforward to make progress in background on a dedicated core. Then, we propose an algorithm for tree-based collective operations that splits the tree between communication cores and application cores. To get the best of both worlds, the algorithm runs the short but heavy part of the tree on application cores, and the long but narrow part of the tree on one or several communication cores, so as to get a trade-off between overlap and absolute performance. We provide a model to study and predict its behavior and to tune its parameters. We implemented both algorithms in the multiprocessor computing framework, which is a thread-based MPI implementation. We have run benchmarks on manycore processors such as the KNL and Skylake and get good results for both performance and overlap.<\/jats:p>","DOI":"10.1177\/1094342019860184","type":"journal-article","created":{"date-parts":[[2019,7,2]],"date-time":"2019-07-02T23:02:21Z","timestamp":1562108541000},"page":"1240-1254","update-policy":"https:\/\/doi.org\/10.1177\/sage-journals-update-policy","source":"Crossref","is-referenced-by-count":9,"title":["Study on progress threads placement and dedicated cores for overlapping MPI nonblocking collectives on manycore processor"],"prefix":"10.1177","volume":"33","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-8606-4344","authenticated-orcid":false,"given":"Alexandre","family":"Denis","sequence":"first","affiliation":[{"name":"Inria, LaBRI, CNRS, University of Bordeaux, Bordeaux-INP, France"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Julien","family":"Jaeger","sequence":"additional","affiliation":[{"name":"CEA, DAM, DIF, Arpajon, France"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Emmanuel","family":"Jeannot","sequence":"additional","affiliation":[{"name":"Inria, LaBRI, CNRS, University of Bordeaux, Bordeaux-INP, France"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Marc","family":"P\u00e9rache","sequence":"additional","affiliation":[{"name":"CEA, DAM, DIF, Arpajon, France"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Hugo","family":"Taboada","sequence":"additional","affiliation":[{"name":"CEA, DAM, DIF, Arpajon, France"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"179","published-online":{"date-parts":[[2019,7,2]]},"reference":[{"key":"bibr1-1094342019860184","doi-asserted-by":"publisher","DOI":"10.1145\/1088149.1088183"},{"key":"bibr2-1094342019860184","unstructured":"Coulomb K, Faverge M, Jazeix J, et al. (2016) Visual trace explorer. Available at: http:\/\/vite.gforge.inria.fr\/. (accessed 26 June 2019)."},{"key":"bibr3-1094342019860184","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-44520-X_17"},{"key":"bibr4-1094342019860184","unstructured":"Denis A (2015) pioman: a pthread-based multithreaded communication engine. In: Euromicro International Conference on Parallel, Distributed and Network-based Processing, Turku, Finland, 4\u20136 March 2015. Available at: https:\/\/hal.inria.fr\/hal-01087775 (accessed 26 June 2019)."},{"key":"bibr5-1094342019860184","doi-asserted-by":"publisher","DOI":"10.1109\/HOTI.2015.15"},{"key":"bibr6-1094342019860184","doi-asserted-by":"publisher","DOI":"10.1145\/1378533.1378554"},{"key":"bibr7-1094342019860184","doi-asserted-by":"publisher","DOI":"10.1109\/CLUSTR.2008.4663774"},{"key":"bibr8-1094342019860184","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2008.4536138"},{"key":"bibr9-1094342019860184","doi-asserted-by":"publisher","DOI":"10.1145\/1362622.1362692"},{"key":"bibr10-1094342019860184","unstructured":"Intel Corporation (2018) IMB-NBC benchmarks. Available at: https:\/\/software.intel.com\/fr-fr\/node\/561946 (accessed 10 May 2018)."},{"key":"bibr11-1094342019860184","doi-asserted-by":"publisher","DOI":"10.1007\/s00450-009-0090-8"},{"key":"bibr12-1094342019860184","doi-asserted-by":"crossref","unstructured":"Ma T, Bosilca G, Bouteiller A, et al. (2011) Kernel assisted collective intra-node MPI communication among multi-core and many-core CPUs. In: 40th International Conference on Parallel Processing (ICPP-2011). Taipei, Taiwan. IEEE. DOI: 10.1109\/ICPP.2011.29. Available at: https:\/\/hal.inria.fr\/inria-00602877 (accessed 26 June 2019).","DOI":"10.1109\/ICPP.2011.29"},{"key":"bibr13-1094342019860184","unstructured":"MPI Forum (2012) MPI: a Message-Passing Interface Standard Version 3.0."},{"key":"bibr14-1094342019860184","doi-asserted-by":"crossref","unstructured":"P\u00e9rache M, Jourdren H, Namyst R (2008) MPC: a unified parallel runtime for clusters of NUMA machines. In: The 14th International Euro-Par Conference, LNCS, volume 5168, Las Palmas de Gran Canaria, Spain, pp. 78\u201388. Springer. DOI: 10.1007\/978-3-540-85451-7_9. Available at: https:\/\/hal.inria.fr\/inria-00422229. (accessed 26 June 2019).","DOI":"10.1007\/978-3-540-85451-7_9"},{"key":"bibr15-1094342019860184","doi-asserted-by":"publisher","DOI":"10.1109\/HPCS.2008.10"},{"key":"bibr16-1094342019860184","doi-asserted-by":"publisher","DOI":"10.1145\/3236367.3236376"},{"key":"bibr17-1094342019860184","doi-asserted-by":"publisher","DOI":"10.1007\/11846802_15"},{"key":"bibr18-1094342019860184","doi-asserted-by":"publisher","DOI":"10.1145\/2597652.2597658"},{"key":"bibr19-1094342019860184","doi-asserted-by":"publisher","DOI":"10.1145\/1122971.1122978"}],"container-title":["The International Journal of High Performance Computing Applications"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/journals.sagepub.com\/doi\/pdf\/10.1177\/1094342019860184","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/journals.sagepub.com\/doi\/full-xml\/10.1177\/1094342019860184","content-type":"application\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/journals.sagepub.com\/doi\/pdf\/10.1177\/1094342019860184","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,4,29]],"date-time":"2026-04-29T08:15:51Z","timestamp":1777450551000},"score":1,"resource":{"primary":{"URL":"https:\/\/journals.sagepub.com\/doi\/10.1177\/1094342019860184"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,7,2]]},"references-count":19,"journal-issue":{"issue":"6","published-print":{"date-parts":[[2019,11]]}},"alternative-id":["10.1177\/1094342019860184"],"URL":"https:\/\/doi.org\/10.1177\/1094342019860184","relation":{},"ISSN":["1094-3420","1741-2846"],"issn-type":[{"value":"1094-3420","type":"print"},{"value":"1741-2846","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,7,2]]}}}