{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T22:59:08Z","timestamp":1725577148915},"reference-count":29,"publisher":"CRC Press","isbn-type":[{"type":"print","value":"9781439825365"},{"type":"electronic","value":"9781439825372"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,12,7]]},"DOI":"10.1201\/b10376-19","type":"book-chapter","created":{"date-parts":[[2011,1,28]],"date-time":"2011-01-28T09:37:12Z","timestamp":1296207432000},"page":"255-277","source":"Crossref","is-referenced-by-count":3,"title":["Manycore Stencil Computations in Hyperthermia Applications"],"prefix":"10.1201","author":[{"given":"Matthias","family":"Christen","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Olaf","family":"Schenk","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Esra","family":"Neufeld","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Maarten","family":"Paulides","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Helmar","family":"Burkhart","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"301","published-online":{"date-parts":[[2011,1,28]]},"reference":[{"key":"p_1","doi-asserted-by":"crossref","unstructured":"T. Brandvik and G. Pullan. Acceleration of a 3D Euler solver using commodity graphics hardware. In46th AIAA Aerospace Sciences Meeting. American Institute of Aeronautics and Astronautics, January 2008.","DOI":"10.2514\/6.2008-607"},{"key":"p_2","doi-asserted-by":"publisher","DOI":"10.1088\/0031-9155\/55\/2\/N01"},{"key":"p_3","unstructured":"M. Christen, O. Schenk, P. Messmer, E. Neufeld, and H. Burkhart. Accelerating stencil-based computations by increased temporal locality on modern multi- and many-core architectures. InHigh Performance and Hardware Aware Computing: Proceedings of the First International Workshop on New Frontiers in High-performance and Hardware-aware Computing (HipHaC'08), Lake Como, Italy, November 2008(in conjunction with MICRO-41), pages 47-54. Universit\u00e4tsverlag Karlsruhe, 2008."},{"key":"p_4","doi-asserted-by":"crossref","unstructured":"M. Christen, O. Schenk, E. Neufeld, P. Messmer, and H. Burkhart. Parallel data-locality aware stencil computations on modern microarchitectures. InProceedings of the 2009 IEEE International Symposium on Parallel & Distributed Processing, pages1-10. IEEEComputer Society, 2009.","DOI":"10.1109\/IPDPS.2009.5161031"},{"key":"p_5","doi-asserted-by":"publisher","DOI":"10.1137\/070693199"},{"volume-title":"Auto-tuning Stencil Computations on Diverse Multicore Architectures","author":"Datta K.","key":"p_6"},{"key":"p_7","doi-asserted-by":"publisher","DOI":"10.1080\/02656730701502077"},{"key":"p_8","doi-asserted-by":"publisher","DOI":"10.1080\/02656730500271668"},{"key":"p_9","doi-asserted-by":"crossref","unstructured":"M. Frigo and V. Strumpen. Cache oblivious stencil computations. InICS '05: Proceedings of the 19th Annual International Conference on Supercomputing, pages361-366, New York, NY, USA, ACM, 2005.","DOI":"10.1145\/1088149.1088197"},{"volume-title":"Einsatz und Leistungsanalyse der Cell Broadband Engine. Master\u2019s thesis","year":"2007","author":"Hackenberg Daniel","key":"p_10"},{"key":"p_11","doi-asserted-by":"publisher","DOI":"10.1007\/s006070070032"},{"key":"p_12","doi-asserted-by":"crossref","unstructured":"Christian Lengauer. Loop parallelization in the polytope model. InCONCUR '93: Proceedings of the 4th International Conference on Concurrency Theory, pages398-416, London, UK, Springer-Verlag, 1993.","DOI":"10.1007\/3-540-57208-2_28"},{"key":"p_13","doi-asserted-by":"publisher","DOI":"10.1145\/1034774.1034777"},{"key":"p_15","doi-asserted-by":"crossref","unstructured":"Paulius Micikevicius. 3D finite difference computation on GPUs using CUDA. In GPGPU-2: Proceedings of 2nd Workshop on General Purpose Processing on Graphics Processing Units, pages 79-84, New York, NY, USA, ACM, 2009.","DOI":"10.1145\/1513895.1513905"},{"key":"p_16","doi-asserted-by":"publisher","DOI":"10.1088\/0031-9155\/52\/15\/001"},{"key":"p_18","doi-asserted-by":"publisher","DOI":"10.1080\/02656730701670478"},{"key":"p_19","doi-asserted-by":"publisher","DOI":"10.1080\/02656730601150522"},{"issue":"2","key":"p_20","doi-asserted-by":"crossref","first-page":"93","DOI":"10.1152\/jappl.1948.1.2.93","volume":"1","author":"Pennes H. H.","year":"1948","journal-title":"J Appl Physiol"},{"key":"p_21","doi-asserted-by":"crossref","unstructured":"G. Rivera and C. Tseng. Tiling optimizations for 3D scientific computations. In Supercomputing, ACM\/IEEE 2000 Conference, 2000.","DOI":"10.1109\/SC.2000.10015"},{"issue":"11","key":"p_22","first-page":"2059","volume":"45","author":"Samaras T.","year":"2000","journal-title":"IEEE Trans Microw Eng Techn"},{"key":"p_23","series-title":"Lecture Notes in Computer Science","volume-title":"Cache-efficient multigrid algorithms","author":"Sellappa S.","year":"2001"},{"key":"p_24","doi-asserted-by":"crossref","unstructured":"Y. Song and Z. Li. A compiler framework for tiling imperfectly-nested loops. InProceedings of the 12th International Workshop on Languages and Compilers for Parallel Computing, pages185-200. Springer-Verlag, 1999.","DOI":"10.1007\/3-540-44905-1_12"},{"volume-title":"Schmid und Partner Engineering AG (SPEAG)","year":"2006","author":"SPEAG. SEMCAD X","key":"p_25"},{"key":"p_26","doi-asserted-by":"publisher","DOI":"10.1016\/S0360-3016(02)04144-5"},{"key":"p_27","doi-asserted-by":"publisher","DOI":"10.1093\/annonc\/mdf280"},{"key":"p_28","doi-asserted-by":"publisher","DOI":"10.1115\/1.3138533"},{"key":"p_29","doi-asserted-by":"publisher","DOI":"10.1007\/s10766-007-0034-5"},{"key":"p_30","doi-asserted-by":"crossref","unstructured":"D. Wonnacott. Time skewing for parallel computers. InProceedings of the 12th Workshop on Languages and Compilers for Parallel Computing, pages477-480. Springer-Verlag, 1999.","DOI":"10.1007\/3-540-44905-1_35"},{"key":"p_31","doi-asserted-by":"publisher","DOI":"10.1016\/S1470-2045(02)00818-5"}],"container-title":["Chapman & Hall\/CRC Computational Science","Scientific Computing with Multicore and Accelerators"],"original-title":[],"language":"en","deposited":{"date-parts":[[2019,6,8]],"date-time":"2019-06-08T01:43:04Z","timestamp":1559958184000},"score":1,"resource":{"primary":{"URL":"http:\/\/www.crcnetbase.com\/doi\/abs\/10.1201\/b10376-19"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,12,7]]},"ISBN":["9781439825365","9781439825372"],"references-count":29,"alternative-id":["10.1201\/b10376-19","10.1201\/CHCOMPUTSCI","10.1201\/b10376"],"URL":"https:\/\/doi.org\/10.1201\/b10376-19","relation":{},"ISSN":["2154-4492"],"issn-type":[{"type":"print","value":"2154-4492"}],"subject":[],"published":{"date-parts":[[2010,12,7]]}}}