{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,6,23]],"date-time":"2024-06-23T15:51:52Z","timestamp":1719157912516},"reference-count":10,"publisher":"Association for Computing Machinery (ACM)","issue":"12","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Proc. VLDB Endow."],"published-print":{"date-parts":[[2013,8,28]]},"abstract":"<jats:p>Solid State Drives (SSDs) are a moving target for system designers: they are black boxes, their internals are undocumented, and their performance characteristics vary across models. There is no appropriate analytical model and experimenting with commercial SSDs is cumbersome, as it requires a careful experimental methodology to ensure repeatability. Worse, performance results obtained on a given SSD cannot be generalized. Overall, it is impossible to explore how a given algorithm, say a hash join or LSM-tree insertions, leverages the intrinsic parallelism of a modern SSD, or how a slight change in the internals of an SSD would impact its overall performance. In this paper, we propose a new SSD simulation framework, named EagleTree, which addresses these problems, and enables a principled study of SSD-Based algorithms. The demonstration scenario illustrates the design space for algorithms based on an SSD-based IO stack, and shows how researchers and practitioners can use EagleTree to perform tractable explorations of this complex design space.<\/jats:p>","DOI":"10.14778\/2536274.2536298","type":"journal-article","created":{"date-parts":[[2014,6,24]],"date-time":"2014-06-24T12:17:57Z","timestamp":1403612277000},"page":"1290-1293","source":"Crossref","is-referenced-by-count":19,"title":["EagleTree"],"prefix":"10.14778","volume":"6","author":[{"given":"Niv","family":"Dayan","sequence":"first","affiliation":[{"name":"IT University of Copenhagen, Copenhagen, Denmark"}]},{"given":"Martin Kj\u00e6r","family":"Svendsen","sequence":"additional","affiliation":[{"name":"IT University of Copenhagen, Copenhagen, Denmark"}]},{"given":"Matias","family":"Bj\u00f8rling","sequence":"additional","affiliation":[{"name":"IT University of Copenhagen, Copenhagen, Denmark"}]},{"given":"Philippe","family":"Bonnet","sequence":"additional","affiliation":[{"name":"IT University of Copenhagen, Copenhagen, Denmark"}]},{"given":"Luc","family":"Bouganim","sequence":"additional","affiliation":[{"name":"INRIA Paris-Rocquencourt, France and PRISM Laboratory, Univ. of Versailles, France"}]}],"member":"320","published-online":{"date-parts":[[2013,8]]},"reference":[{"key":"e_1_2_1_1_1","volume-title":"USENIX ATC","author":"Agrawal N.","year":"2008","unstructured":"N. Agrawal , V. Prabhakaran , T. Wobber , John. Davis, M. Manasse , R. Panigrahy . Design tradeoffs for SSD performance . USENIX ATC , 2008 . N. Agrawal, V. Prabhakaran, T. Wobber, John. Davis, M. Manasse, R. Panigrahy. Design tradeoffs for SSD performance. USENIX ATC, 2008."},{"key":"e_1_2_1_2_1","volume-title":"CIDR","author":"Bj\u00f8rling M.","year":"2013","unstructured":"M. Bj\u00f8rling , P. Bonnet , L. Bouganim , N. Dayan . The Necessary Death of the Block Device Interface . CIDR , 2013 . M. Bj\u00f8rling, P. Bonnet, L. Bouganim, N. Dayan. The Necessary Death of the Block Device Interface. CIDR, 2013."},{"key":"e_1_2_1_3_1","volume-title":"System Co-Design and Data Management for Flash Devices. VLDB","author":"Bonnet P.","year":"2011","unstructured":"P. Bonnet , L. Bouganim , I. Koltsidas , S. Viglas . System Co-Design and Data Management for Flash Devices. VLDB 2011 . P. Bonnet, L. Bouganim, I. Koltsidas, S. Viglas. System Co-Design and Data Management for Flash Devices. VLDB 2011."},{"key":"e_1_2_1_4_1","volume-title":"CIDR","author":"Bouganim L.","year":"2009","unstructured":"L. Bouganim , B. T. J\u00f2nsson , and P. Bonnet . uFLIP: Understanding flash I\/O patterns . CIDR , 2009 . L. Bouganim, B. T. J\u00f2nsson, and P. Bonnet. uFLIP: Understanding flash I\/O patterns. CIDR, 2009."},{"key":"e_1_2_1_5_1","volume-title":"ASPLOS","author":"Gupta A.","year":"2009","unstructured":"A. Gupta , Y. Kim , and B. Urgaonkar . DFTL: a flash translation layer employing demand-based selective caching of page-level address mappings . In ASPLOS , 2009 . A. Gupta, Y. Kim, and B. Urgaonkar. DFTL: a flash translation layer employing demand-based selective caching of page-level address mappings. In ASPLOS, 2009."},{"key":"e_1_2_1_6_1","volume-title":"MSST","author":"Jung M.","year":"2012","unstructured":"M. Jung , E. Wilson , D. Donofrio , J. Shalf , M. Kandemir . NANDFlashSim : Intrinsic latency variation aware NAND flash memory system modeling and simulation at microarchitecture level . MSST 2012 . M. Jung, E. Wilson, D. Donofrio, J. Shalf, M. Kandemir. NANDFlashSim: Intrinsic latency variation aware NAND flash memory system modeling and simulation at microarchitecture level. MSST 2012."},{"key":"e_1_2_1_7_1","volume-title":"SIMUL","author":"Kim Y.","year":"2009","unstructured":"Y. Kim , B. Tauras , A. Gupta , D. Mihai , N. Urgaonkar . FlashSim : A Simulator for NAND Flash-based Solid-State Drives . SIMUL , 2009 . Y. Kim, B. Tauras, A. Gupta, D. Mihai, N. Urgaonkar. FlashSim: A Simulator for NAND Flash-based Solid-State Drives. SIMUL, 2009."},{"key":"e_1_2_1_8_1","volume-title":"MSST","author":"Park D.","year":"2011","unstructured":"D. Park , D. Du . Hot Data Identification for Flash-based Storage Systems Using Multiple Bloom Filters . MSST , 2011 . D. Park, D. Du. Hot Data Identification for Flash-based Storage Systems Using Multiple Bloom Filters. MSST, 2011."},{"key":"e_1_2_1_9_1","volume-title":"FAST","author":"Saxena M.","year":"2013","unstructured":"M. Saxena , Y. Zhang , M. M. Swift , A. C. Arpaci-Dusseau , R. H. Arpaci-Dusseau . Getting Real : Lessons in Transitioning Research Simulations into Hardware Systems , FAST , 2013 . M. Saxena, Y. Zhang, M. M. Swift, A. C. Arpaci-Dusseau, R. H. Arpaci-Dusseau. Getting Real: Lessons in Transitioning Research Simulations into Hardware Systems, FAST, 2013."},{"key":"e_1_2_1_10_1","unstructured":"The OpenSSD Project. http:\/\/www.openssd-project.org  The OpenSSD Project. http:\/\/www.openssd-project.org"}],"container-title":["Proceedings of the VLDB Endowment"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.14778\/2536274.2536298","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,12,28]],"date-time":"2022-12-28T10:55:18Z","timestamp":1672224918000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.14778\/2536274.2536298"}},"subtitle":["exploring the design space of SSD-based algorithms"],"short-title":[],"issued":{"date-parts":[[2013,8]]},"references-count":10,"journal-issue":{"issue":"12","published-print":{"date-parts":[[2013,8,28]]}},"alternative-id":["10.14778\/2536274.2536298"],"URL":"https:\/\/doi.org\/10.14778\/2536274.2536298","relation":{},"ISSN":["2150-8097"],"issn-type":[{"value":"2150-8097","type":"print"}],"subject":[],"published":{"date-parts":[[2013,8]]}}}