{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,23]],"date-time":"2026-01-23T17:59:53Z","timestamp":1769191193482,"version":"3.49.0"},"reference-count":32,"publisher":"Association for Computing Machinery (ACM)","issue":"4","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Proc. VLDB Endow."],"published-print":{"date-parts":[[2019,12,9]]},"abstract":"<jats:p>The emergence of persistent memory (PM) spurs on redesigns of database system components to gain full exploitation of the persistence and speed of the hardware. One crucial component studied by researchers is persistent indices. However, such studies to date are unsatisfactory in terms of the number of expensive PM writes required for crash-consistency. In this paper, we propose a new persistent index called DPTree (Differential Persistent Tree) to address this. DPTree's core idea is to batch multiple writes in DRAM persistently and later merge them into a PM component to amortize persistence overhead. DPTree includes several techniques and algorithms to achieve crash-consistency, reduce PM writes significantly, and maintain excellent read performance. To embrace multi-core processors, we present the design of concurrent DPTree. Our experiments on Intel's Optane DIMMs show that DPTree reduces PM writes by a factor of 1.7x-3x compare to state-of-the-art counterparts. Besides, DPTree has a competitive or better read performance and scales well in multi-core environment.<\/jats:p>","DOI":"10.14778\/3372716.3372717","type":"journal-article","created":{"date-parts":[[2020,1,6]],"date-time":"2020-01-06T20:19:37Z","timestamp":1578341977000},"page":"421-434","source":"Crossref","is-referenced-by-count":68,"title":["DPTree"],"prefix":"10.14778","volume":"13","author":[{"given":"Xinjing","family":"Zhou","sequence":"first","affiliation":[{"name":"Zhejiang University"}]},{"given":"Lidan","family":"Shou","sequence":"additional","affiliation":[{"name":"Zhejiang University"}]},{"given":"Ke","family":"Chen","sequence":"additional","affiliation":[{"name":"Zhejiang University"}]},{"given":"Wei","family":"Hu","sequence":"additional","affiliation":[{"name":"Alibaba Group"}]},{"given":"Gang","family":"Chen","sequence":"additional","affiliation":[{"name":"Zhejiang University"}]}],"member":"320","published-online":{"date-parts":[[2020,1,6]]},"reference":[{"key":"e_1_2_1_1_1","unstructured":"3d xpoint\u2122 : A breakthrough in non-volatile memory technology. https:\/\/www.intel.com\/content\/www\/us\/en\/architecture-and-technology\/intel-micron-3d-xpoint-webcast.html.  3d xpoint \u2122 : A breakthrough in non-volatile memory technology. https:\/\/www.intel.com\/content\/www\/us\/en\/architecture-and-technology\/intel-micron-3d-xpoint-webcast.html."},{"key":"e_1_2_1_2_1","unstructured":"Aerospike performance on intel optane persistent memory. http:\/\/pages.aerospike.com\/rs\/229-XUE-318\/images\/Aerospike_Solution_Brief__Intel-Optane.pdf.  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