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Researchers often face difficulties when developing edge devices, since dealing with sensors detecting parameters such as humidity or temperature often requires large and power-consuming ADCs. We propose a possible mitigation, namely using a RRAM device in combination with a comparator circuit to form a basic block for threshold detection. This can be expanded towards programmable non-uniform sampling ADCs, significantly reducing both area and power consumption since significantly smaller bit-resolutions are required. We demonstrate how a comparator circuit designed in 130\u202fnm technology can be reprogrammed by programming the incorporated RRAM device. Our proposed building block consumes 83\u202f\u00b5W.<\/jats:p>","DOI":"10.1515\/itit-2023-0021","type":"journal-article","created":{"date-parts":[[2023,5,4]],"date-time":"2023-05-04T20:50:36Z","timestamp":1683233436000},"page":"39-51","source":"Crossref","is-referenced-by-count":1,"title":["An RRAM-based building block for reprogrammable non-uniform sampling ADCs"],"prefix":"10.1515","volume":"65","author":[{"given":"Abhinav","family":"Vishwakarma","sequence":"first","affiliation":[{"name":"Brandenburgische Technische Universit\u00e4t, Cottbus\u2013Senftenberg, Computer Engineering Institute , Konrad-Wachsmann-Allee 5, 03046 Cottbus , Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Markus","family":"Fritscher","sequence":"additional","affiliation":[{"name":"Brandenburgische Technische Universit\u00e4t, Cottbus\u2013Senftenberg, Computer Engineering Institute , Konrad-Wachsmann-Allee 5, 03046 Cottbus , Germany"},{"name":"IHP \u2013 Leibniz Institute for High Performance Microelectronics , Im Technologiepark 25, 15236 Frankfurt (Oder) , Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Amelie","family":"Hagelauer","sequence":"additional","affiliation":[{"name":"Chair of Micro- and Nanosystems Technology , Technische Universit\u00e4t M\u00fcnchen , Munich , Germany"},{"name":"Fraunhofer EMFT Fraunhofer Institute for Electronic Microsystems and Solid State Technologies , Munich , Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Marc","family":"Reichenbach","sequence":"additional","affiliation":[{"name":"Brandenburgische Technische Universit\u00e4t, Cottbus\u2013Senftenberg, Computer Engineering Institute , Konrad-Wachsmann-Allee 5, 03046 Cottbus , Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"374","published-online":{"date-parts":[[2023,5,4]]},"reference":[{"key":"2024082716125586491_j_itit-2023-0021_ref_001","doi-asserted-by":"crossref","unstructured":"L. O. Chua, \u201cMemristor the missing circuit element,\u201d IEEE Trans. Circ. Theor., vol.\u00a018, no.\u00a05, pp.\u00a0507\u2013519, 1971. https:\/\/doi.org\/10.1109\/tct.1971.1083337.","DOI":"10.1109\/TCT.1971.1083337"},{"key":"2024082716125586491_j_itit-2023-0021_ref_002","doi-asserted-by":"crossref","unstructured":"K. Eshraghian, O. Kavehei, K.-R. Cho, et al.., \u201cMemristive device fundamentals and modeling: applications to circuits and systems simulation,\u201d IEEE, vol.\u00a0100, no.\u00a06, pp.\u00a01991\u20132007, 2012. https:\/\/doi.org\/10.1109\/jproc.2012.2188770.","DOI":"10.1109\/JPROC.2012.2188770"},{"key":"2024082716125586491_j_itit-2023-0021_ref_003","doi-asserted-by":"crossref","unstructured":"B. J. Choi, D. S. Jeong, S. K. Kim, et al.., \u201cResistive switching mechanism of TiO 2 thin films grown by atomic-layer deposition,\u201d J. Appl. Phys., vol.\u00a098, no.\u00a03, p.\u00a0033715, 2005. https:\/\/doi.org\/10.1063\/1.2001146.","DOI":"10.1063\/1.2001146"},{"key":"2024082716125586491_j_itit-2023-0021_ref_004","doi-asserted-by":"crossref","unstructured":"D. S. Jeong, H. Schroeder, and R. Waser, \u201cCoexistence of bipolar and unipolar resistive switching behaviors in a Pt\/TiO2\/Pt stack,\u201d Electrochem. Solid State Lett., vol.\u00a010, no.\u00a08, p.\u00a0G51, 2007. https:\/\/doi.org\/10.1149\/1.2742989.","DOI":"10.1149\/1.2742989"},{"key":"2024082716125586491_j_itit-2023-0021_ref_005","doi-asserted-by":"crossref","unstructured":"D. B. Strukov, G. S. Snider, D. R. Stewart, and R. S. Williams, \u201cThe missing Memristor found,\u201d Nature, vol.\u00a0453, pp.\u00a080\u201383, 2008. https:\/\/doi.org\/10.1038\/nature06932.","DOI":"10.1038\/nature06932"},{"key":"2024082716125586491_j_itit-2023-0021_ref_006","doi-asserted-by":"crossref","unstructured":"G. Sharma and L. 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Zhang, et al.., \u201cUnified physical model of bipolar oxide-based resistive switching memory,\u201d IEEE Electron Device Lett., vol.\u00a030, pp.\u00a01326\u20131328, 2009. https:\/\/doi.org\/10.1109\/led.2009.2032308.","DOI":"10.1109\/LED.2009.2032308"},{"key":"2024082716125586491_j_itit-2023-0021_ref_023","doi-asserted-by":"crossref","unstructured":"Z. Jiang, Y. Wu, S. Yu, et al.., \u201cA compact model for metal oxide resistive random-access memory with experiment verification,\u201d IEEE Trans. Electron Devices, vol.\u00a063, no.\u00a05, pp.\u00a01884\u20131892, 2016. https:\/\/doi.org\/10.1109\/ted.2016.2545412.","DOI":"10.1109\/TED.2016.2545412"},{"key":"2024082716125586491_j_itit-2023-0021_ref_024","doi-asserted-by":"crossref","unstructured":"J. Reuben, D. Fey, and C. Wenger, \u201cA modeling methodology for resistive ram based on stanford-pku model with extended multilevel capability,\u201d IEEE Trans. Nanotechnol., vol.\u00a018, pp.\u00a0647\u2013656, 2019. https:\/\/doi.org\/10.1109\/tnano.2019.2922838.","DOI":"10.1109\/TNANO.2019.2922838"},{"key":"2024082716125586491_j_itit-2023-0021_ref_025","doi-asserted-by":"crossref","unstructured":"H. J. Landau, \u201cNecessary density condition of certain entire function,\u201d Acta Math., vol.\u00a0117, pp.\u00a037\u201352, 1967. https:\/\/doi.org\/10.1007\/bf02395039.","DOI":"10.1007\/BF02395039"},{"key":"2024082716125586491_j_itit-2023-0021_ref_026","doi-asserted-by":"crossref","unstructured":"F. Marvasti, Nonuniform Sampling: Theory and Practice, New York, Springer Science+Business Media (Originally published by Kluwer Academic\/Plenum Publishers), 2001, pp. 169\u2013234, ISBN 978-1-4613-5451-2.","DOI":"10.1007\/978-1-4615-1229-5_4"},{"key":"2024082716125586491_j_itit-2023-0021_ref_027","unstructured":"P. E Allen and D. R. Holberg, CMOS Analog Circuit Design, New York, Oxford University Press, 2002, ISBN 0-19-511644-5."},{"key":"2024082716125586491_j_itit-2023-0021_ref_028","unstructured":"Available at: https:\/\/microcontrollerslab.com\/analog-to-digital-adc-converter-working."},{"key":"2024082716125586491_j_itit-2023-0021_ref_029","doi-asserted-by":"crossref","unstructured":"S. Velagaleti, \u201cA novel high-speed dynamic comparator with low power dissipation and low offset,\u201d M-Tech 4 thesis, NIT Rourkela, India, 2009.","DOI":"10.1007\/978-3-642-15766-0_7"},{"key":"2024082716125586491_j_itit-2023-0021_ref_030","doi-asserted-by":"crossref","unstructured":"S. Khan, \u201cDesign of high gain low voltage CMOS comparator,\u201d Int. J. Res. Appl. Sci. Eng. Technol., vol.\u00a06, pp.\u00a01567\u20131572, 2018. https:\/\/doi.org\/10.22214\/ijraset.2018.4261.","DOI":"10.22214\/ijraset.2018.4261"},{"key":"2024082716125586491_j_itit-2023-0021_ref_031","doi-asserted-by":"crossref","unstructured":"A. Majumder, M. Das, B. Nath, A. J. Mondal, and B. K. Bhattacharyya, \u201cDesign of low noise high-speed novel dynamic analog comparator in 65 nm,\u201d in 26th Conference Radio Electronics, Slovak Republic, Kosice, 2016.","DOI":"10.1109\/RADIOELEK.2016.7477385"},{"key":"2024082716125586491_j_itit-2023-0021_ref_032","doi-asserted-by":"crossref","unstructured":"S. Huang, S. Diao, and F. Lin, \u201cAn energy-efficient high-speed CMOS hybrid comparator with reduced delay time in the 40-nm CMOS process,\u201d Analog Integr. Circuits Signal Process., vol.\u00a089, pp.\u00a0231\u2013238, 2016. https:\/\/doi.org\/10.1007\/s10470-016-0811-4.","DOI":"10.1007\/s10470-016-0811-4"},{"key":"2024082716125586491_j_itit-2023-0021_ref_033","doi-asserted-by":"crossref","unstructured":"C.-H. Chan, Y. Zhu, U. Chio, S.-W. Sin, U. Seng-Pan, and Martins, \u201cAA reconfigurable low-noise dynamic comparator with offset calibration in 90\u202fnm CMOS,\u201d in IEEE Asian Solid-State Circuits Conference (A-SSCC), 2011, pp.\u00a0233\u2013236.","DOI":"10.1109\/ASSCC.2011.6123645"},{"key":"2024082716125586491_j_itit-2023-0021_ref_034","doi-asserted-by":"crossref","unstructured":"B. Wicht, T. Nirschl, and D. Schmitt-Landsiedel, \u201cYield and speed optimization of a latch-type voltage sense amplifier,\u201d IEEE J. Solid State Circ., vol.\u00a039, no.\u00a07, pp.\u00a01148\u20131158, 2004. https:\/\/doi.org\/10.1109\/jssc.2004.829399.","DOI":"10.1109\/JSSC.2004.829399"},{"key":"2024082716125586491_j_itit-2023-0021_ref_035","doi-asserted-by":"crossref","unstructured":"S. Babayan-Mashhadi and R. Lotfi, \u201cAnalysis and design of a low-voltage low-power double-tail comparator,\u201d IEEE Trans. Very Large Scale Integr. Syst., vol.\u00a022, no.\u00a02, pp.\u00a0343\u2013352, 2014. https:\/\/doi.org\/10.1109\/tvlsi.2013.2241799.","DOI":"10.1109\/TVLSI.2013.2241799"},{"key":"2024082716125586491_j_itit-2023-0021_ref_036","doi-asserted-by":"crossref","unstructured":"T.-F. Wu, C.-R. Ho, and M. S.-W. Chen, \u201cA flash based non-uniform sampling ADC with hybrid quantization enabling digital anti-aliasing filter,\u201d IEEE J. Solid State Circ., vol.\u00a052, no.\u00a09, pp.\u00a02335\u20132349, 2017. https:\/\/doi.org\/10.1109\/jssc.2017.2718671.","DOI":"10.1109\/JSSC.2017.2718671"},{"key":"2024082716125586491_j_itit-2023-0021_ref_037","doi-asserted-by":"crossref","unstructured":"C. A. Pappas, \u201cA non-uniform sampling ADC: parallel digital ramp pluse position modulation,\u201d in IEEE Canadian Conference on Electrical & Computer Engineering, 2018.","DOI":"10.1109\/CCECE.2018.8447844"},{"key":"2024082716125586491_j_itit-2023-0021_ref_038","doi-asserted-by":"crossref","unstructured":"T.-F. Wu, C.-R. Ho, and M. S.-W. Chen, \u201cA non-uniform sampling ADC architecture with reconfigurable digital anti-aliasing filter,\u201d IEEE Trans. Circuits Syst. I: Regul. Pap., vol.\u00a063, pp.\u00a01639\u20131651, 2016. https:\/\/doi.org\/10.1109\/tcsi.2016.2586523.","DOI":"10.1109\/TCSI.2016.2586523"},{"key":"2024082716125586491_j_itit-2023-0021_ref_039","doi-asserted-by":"crossref","unstructured":"W. Cao, X. He, A. Chakrabarti, and X. Zhang, \u201cNeuADC: Neural network-inspired RRAM-based synthesizable analog-to-digital conversion with reconfigurable quantization support,\u201d in Design Automation & Test in Europe Conference & Exhibition (DATE), IEEE, 2019, pp. 1477\u20131482.","DOI":"10.23919\/DATE.2019.8714933"},{"key":"2024082716125586491_j_itit-2023-0021_ref_040","doi-asserted-by":"crossref","unstructured":"J. Gao, G. Li, and Q. Li, \u201cHigh-speed low power common mode insensitive dynamic comparator,\u201d Electron. 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