{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,12,13]],"date-time":"2024-12-13T05:19:46Z","timestamp":1734067186644,"version":"3.30.2"},"reference-count":0,"publisher":"PTI","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.15439\/2014f673","type":"proceedings-article","created":{"date-parts":[[2014,9,29]],"date-time":"2014-09-29T21:07:05Z","timestamp":1412024825000},"page":"9-12","source":"Crossref","is-referenced-by-count":0,"title":["FPGA Verification Module"],"prefix":"10.15439","volume":"4","author":[{"given":"Ivan","family":"Aleksi","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"\u017deljko","family":"Hocenski","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"6175","published-online":{"date-parts":[[2014,9,29]]},"event":{"name":"2014 Federated Conference on Computer Science and Information Systems","start":{"date-parts":[[2014,9,7]]},"end":{"date-parts":[[2014,9,10]]},"acronym":"FedCSIS 2014"},"container-title":["Annals of Computer Science and Information Systems","Proceedings of the E2LP 2014 Workshop"],"original-title":[],"deposited":{"date-parts":[[2024,12,12]],"date-time":"2024-12-12T07:31:36Z","timestamp":1733988696000},"score":1,"resource":{"primary":{"URL":"https:\/\/annals-csis.org\/Volume_4\/drp\/673.html"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,9,29]]},"references-count":0,"URL":"https:\/\/doi.org\/10.15439\/2014f673","relation":{},"ISSN":["2300-5963"],"issn-type":[{"type":"print","value":"2300-5963"}],"subject":[],"published":{"date-parts":[[2014,9,29]]}}}