{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,8,3]],"date-time":"2023-08-03T02:26:20Z","timestamp":1691029580331},"reference-count":6,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"9","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Electron. Express"],"published-print":{"date-parts":[[2013]]},"DOI":"10.1587\/elex.10.20130147","type":"journal-article","created":{"date-parts":[[2013,5,9]],"date-time":"2013-05-09T22:57:05Z","timestamp":1368140225000},"page":"20130147-20130147","source":"Crossref","is-referenced-by-count":2,"title":["Breaking the performance bottleneck of sparse matrix-vector multiplication on SIMD processors"],"prefix":"10.1587","volume":"10","author":[{"given":"Kai","family":"Zhang","sequence":"first","affiliation":[{"name":"School of Computer, National University of Defense Technology"}]},{"given":"Shuming","family":"Chen","sequence":"additional","affiliation":[{"name":"School of Computer, National University of Defense Technology"}]},{"given":"Yaohua","family":"Wang","sequence":"additional","affiliation":[{"name":"School of Computer, National University of Defense Technology"}]},{"given":"Jianghua","family":"Wan","sequence":"additional","affiliation":[{"name":"School of Computer, National University of Defense Technology"}]}],"member":"532","reference":[{"key":"1","doi-asserted-by":"crossref","unstructured":"[1] S. Williams, L. Oliker, R. Vuduc, J. Shalf, K. Yelick, and J. Demmel, &ldquo;Optimization of sparse matrix-vector multiplication on emerging multicore platforms,&rdquo; <i>SC&rsquo;07<\/i>, Nevada, USA, pp. 1-7, 2007.","DOI":"10.1145\/1362622.1362674"},{"key":"2","doi-asserted-by":"crossref","unstructured":"[2] N. Bell and M. Garland, &ldquo;Implementing Sparse Matrix-Vector Multiplication on Throughput-Oriented Processors,&rdquo; <i>SC&rsquo;09<\/i>, Portland, Oregon, pp. 1-11, Nov. 2009.","DOI":"10.1145\/1654059.1654078"},{"key":"3","doi-asserted-by":"crossref","unstructured":"[3] D. DuBois, A. DuBois, C. Connor, and S. Poole, &ldquo;Sparse Matrix-Vector Multiplication on a Reconfigurable Supercomputer,&rdquo; <i>FCCM&rsquo;08<\/i>, California, USA, pp. 239-247, April 2008.","DOI":"10.1109\/FCCM.2008.53"},{"key":"4","doi-asserted-by":"crossref","unstructured":"[4] X. Feng, H. Jin, et al., &ldquo;Optimization of Sparse Matrix-Vector Multiplication with Variant CSR on GPUs,&rdquo; <i>Proc. 17th Int. Conf. Parallel and Distributed Systems<\/i>, Taiwan, pp. 165-172, Dec. 2011.","DOI":"10.1109\/ICPADS.2011.91"},{"key":"5","doi-asserted-by":"crossref","unstructured":"[5] M. Woh, S. Seo, S. Mahlke, T. Mudge, C. Chakrabarti, and K. Flautner, &ldquo;AnySP: Anytime Anywhere Anyway Signal Processing,&rdquo; <i>ISCA&rsquo;09<\/i>, June 2009.","DOI":"10.1145\/1555754.1555773"},{"key":"6","doi-asserted-by":"crossref","unstructured":"[6] S. Chen, et al., &ldquo;YHFT-QDSP: High-Performance Heterogeneous Multi-Core DSP,&rdquo; <i>J. Comput. Sci. Technol.<\/i>, vol. 25, pp. 214-224, 2010.","DOI":"10.1007\/s11390-010-9318-0"}],"container-title":["IEICE Electronics Express"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/10\/9\/10_10.20130147\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,23]],"date-time":"2021-04-23T17:09:56Z","timestamp":1619197796000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/10\/9\/10_10.20130147\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013]]},"references-count":6,"journal-issue":{"issue":"9","published-print":{"date-parts":[[2013]]}},"URL":"https:\/\/doi.org\/10.1587\/elex.10.20130147","relation":{},"ISSN":["1349-2543"],"issn-type":[{"value":"1349-2543","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013]]}}}