{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,7,19]],"date-time":"2024-07-19T20:36:21Z","timestamp":1721421381240},"reference-count":6,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"18","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Electron. Express"],"published-print":{"date-parts":[[2013]]},"DOI":"10.1587\/elex.10.20130518","type":"journal-article","created":{"date-parts":[[2013,8,27]],"date-time":"2013-08-27T23:39:06Z","timestamp":1377646746000},"page":"20130518-20130518","source":"Crossref","is-referenced-by-count":1,"title":["3D Networks-on-Chip mapping targeting minimum signal TSVs"],"prefix":"10.1587","volume":"10","author":[{"given":"Hui","family":"Ding","sequence":"first","affiliation":[{"name":"State Key Laboratory of ISN, Xidian University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Huaxi","family":"Gu","sequence":"additional","affiliation":[{"name":"State Key Laboratory of ISN, Xidian University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yintang","family":"Yang","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics, Xidian University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dongrui","family":"Fan","sequence":"additional","affiliation":[{"name":"Key Laboratory of Computer System and Architecture Institute of Computing Technology, Chinese Academy of Sciences"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"532","reference":[{"key":"1","unstructured":"[1] Y. J. Hwang, J. H. Lee and T. H. Han: 2011 International Conference on ICT Convergence (ICTC) (2011) 517."},{"key":"2","unstructured":"[2] P. K. Hamedani, S. Hessabi, H. Sarbazi-Azad and N. E. Jerger: Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP) (2012) 499."},{"key":"3","unstructured":"[3] J. Wang, L. Li, H. Pan, S. He and R. Zhang: IEEE 9th International Conference on ASIC (ASICON) (2011) 413."},{"key":"4","unstructured":"[4] N. Kapadia and S. Pasricha: 25th International Conference on VLSI Design (VLSID) (2012) 262."},{"key":"5","unstructured":"[5] K. Skadron, M. R. Stan, W. Huang, S. Velusamy, K. Sankaranarayanan and D. Tarjan: Annual International Symposium on Computer Architecture (2003) 2."},{"key":"6","doi-asserted-by":"crossref","unstructured":"[6] A. Hsieh and T. Hwang: IEEE Trans. Very Large Scale Integr. (VLSI) Syst. <b>20<\/b> [4] (2012) 711.","DOI":"10.1109\/TVLSI.2011.2107924"}],"container-title":["IEICE Electronics Express"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/10\/18\/10_10.20130518\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,23]],"date-time":"2021-04-23T17:57:05Z","timestamp":1619200625000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/10\/18\/10_10.20130518\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013]]},"references-count":6,"journal-issue":{"issue":"18","published-print":{"date-parts":[[2013]]}},"URL":"https:\/\/doi.org\/10.1587\/elex.10.20130518","relation":{},"ISSN":["1349-2543"],"issn-type":[{"value":"1349-2543","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013]]}}}