{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,3,31]],"date-time":"2022-03-31T12:54:59Z","timestamp":1648731299679},"reference-count":13,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"3","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Electron. Express"],"published-print":{"date-parts":[[2014]]},"DOI":"10.1587\/elex.11.20130813","type":"journal-article","created":{"date-parts":[[2014,1,14]],"date-time":"2014-01-14T23:06:11Z","timestamp":1389740771000},"page":"20130813-20130813","source":"Crossref","is-referenced-by-count":0,"title":["Resistivity-based modeling of substrate non-uniformity for low-resistivity substrate"],"prefix":"10.1587","volume":"11","author":[{"given":"Toshiki","family":"Kanamoto","sequence":"first","affiliation":[{"name":"Renesas Electronics Corp."}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hisato","family":"Inaba","sequence":"additional","affiliation":[{"name":"Renesas Design Corp."}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Toshiharu","family":"Chiba","sequence":"additional","affiliation":[{"name":"Renesas Design Corp."}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yasuhiro","family":"Ogasahara","sequence":"additional","affiliation":[{"name":"AIST"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"532","reference":[{"key":"1","doi-asserted-by":"crossref","unstructured":"[1] M. D. Wilde, W. Meeus, P. Rombouts and J. V. Campenhout: IEEE J. Solid-State Circuits <b>41<\/b> [5] (2006) 1062.","DOI":"10.1109\/JSSC.2006.872873"},{"key":"2","doi-asserted-by":"crossref","unstructured":"[2] D. Kosaka, M. Nagata, Y. Murasaka and A. Iwata: IEICE Trans. Fundamentals <b>E90-A<\/b> [12] (2007) 2651.","DOI":"10.1093\/ietfec\/e90-a.12.2651"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1587\/transfun.E95.A.2"},{"key":"4","doi-asserted-by":"crossref","unstructured":"[4] M. Nagata, J. Nagai, T. Morie and A. Iwata: IEEE Trans. Computer-Aided Design Integr. Circuits Syst. <b>19<\/b> [6] (2000) 671.","DOI":"10.1109\/43.848088"},{"key":"5","doi-asserted-by":"crossref","unstructured":"[5] S. Kristiansson, F. Ingvarson, S. P. Kagganti, N. Simic, M. Zgrda and K. O. Jeppson: IEEE J. Solid-State Circuits <b>40<\/b> [9] (2005) 1797.","DOI":"10.1109\/JSSC.2005.848172"},{"key":"6","doi-asserted-by":"crossref","unstructured":"[6] C. Xu, R. Gharpurey, T. S. Fiez and K. Mayaram: IEEE Trans. Computer-Aided Design Integr. Circuits Syst. <b>27<\/b> [9] (2008) 1595.","DOI":"10.1109\/TCAD.2008.927766"},{"key":"7","doi-asserted-by":"crossref","unstructured":"[7] A. Samavedam, A. Sadate, K. Mayaram and T. S. Fiez: IEEE J. Solid-State Circuits <b>35<\/b> [6] (2000) 895.","DOI":"10.1109\/4.845193"},{"key":"8","unstructured":"[8] W. K. Chu, N. Verghese, H.-J. Chol, K. Shimazaki, H. Tsujikawa, S. Hirano, S. Doushoh, M. Nagata, A. Iwata and T. Ohmoto: Proc. IEEE Custom Integrated Circuits Conference (2003) 369."},{"key":"9","doi-asserted-by":"crossref","unstructured":"[9] R. Gharpurey and R. G. Meyer: IEEE J. Solid-State Circuits <b>31<\/b> [3] (1996) 344.","DOI":"10.1109\/4.494196"},{"key":"10","unstructured":"[10] S. M. Sze: <i>Semiconductor Devices: Physics and Technology<\/i> (Wiley, 2001) 2nd ed., Chapter 13."},{"key":"11","unstructured":"[11] Cadence Design Systems Inc.: &ldquo;QRC Extraction Users Manual, Product Version 10.1.3 HF1,&rdquo; Oct. 2011."},{"key":"12","unstructured":"[12] Synopsys Corp.: &ldquo;Raphael Interconnect Analysis Program Reference Manual, Version D-2010.03,&rdquo; March 2010."},{"key":"13","unstructured":"[13] A. S. Grove: <i>Physics and Technology of Semiconductor Devices<\/i> (Wiley, 1967)."}],"container-title":["IEICE Electronics Express"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/11\/3\/11_11.20130813\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,23]],"date-time":"2021-04-23T18:57:40Z","timestamp":1619204260000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/11\/3\/11_11.20130813\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014]]},"references-count":13,"journal-issue":{"issue":"3","published-print":{"date-parts":[[2014]]}},"URL":"https:\/\/doi.org\/10.1587\/elex.11.20130813","relation":{},"ISSN":["1349-2543"],"issn-type":[{"value":"1349-2543","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014]]}}}