{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,1]],"date-time":"2026-04-01T18:40:15Z","timestamp":1775068815061,"version":"3.50.1"},"reference-count":14,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"16","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Electron. Express"],"published-print":{"date-parts":[[2015]]},"DOI":"10.1587\/elex.12.20150450","type":"journal-article","created":{"date-parts":[[2015,7,22]],"date-time":"2015-07-22T22:02:46Z","timestamp":1437602566000},"page":"20150450-20150450","source":"Crossref","is-referenced-by-count":5,"title":["FPGA design, simulation and prototyping of a high speed 32-bit pipeline multiplier based on Vedic mathematics"],"prefix":"10.1587","volume":"12","author":[{"given":"Shuja Ahmad","family":"Abbasi","sequence":"first","affiliation":[{"name":"Department of Electrical Engineering, King Saud University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Zulhelmi","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, Syiah Kuala University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Abdul Rahman M.","family":"Alamoud","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, King Saud University"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"532","reference":[{"key":"1","doi-asserted-by":"publisher","unstructured":"[1] J. Valls and E. Boemo: IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process. <b>50<\/b> (2003) 317. DOI:10.1109\/TCSII.2003.811438","DOI":"10.1109\/TCSII.2003.811438"},{"key":"2","doi-asserted-by":"publisher","unstructured":"[2] G. Lakshminarayanan and B. Venkataramani: IEEE Trans. Very Large Scale Integr. (VLSI) Syst. <b>13<\/b> (2005) 783. DOI:10.1109\/TVLSI.2005.850086","DOI":"10.1109\/TVLSI.2005.850086"},{"key":"3","doi-asserted-by":"crossref","unstructured":"[3] F. Dinechin and B. Pasca: FPL (2009) 250.","DOI":"10.1109\/FPL.2009.5272296"},{"key":"4","doi-asserted-by":"crossref","unstructured":"[4] Assady: Eur. J. Sci. Res. <b>26<\/b> (2009) 362.","DOI":"10.1002\/pdi.1420"},{"key":"5","doi-asserted-by":"publisher","unstructured":"[5] S. R. Kuang, J. P. Wang and C. Y. Guo: IEEE Trans. Circuits Syst. II, Exp. Briefs <b>56<\/b> (2009) 404. DOI:10.1109\/TCSII.2009.2019334","DOI":"10.1109\/TCSII.2009.2019334"},{"key":"6","doi-asserted-by":"publisher","unstructured":"[6] M. Sj\u00e4lander and P. Larsson-Edefors: IEEE Trans. Very Large Scale Integr. (VLSI) Syst. <b>17<\/b> (2009) 1233. DOI:10.1109\/TVLSI.2008.2002107","DOI":"10.1109\/TVLSI.2008.2002107"},{"key":"7","doi-asserted-by":"publisher","unstructured":"[7] V. S. Dimitrov: IEEE Trans. Comput. <b>60<\/b> (2011) 189. DOI:10.1109\/TC.2010.200","DOI":"10.1109\/TC.2010.200"},{"key":"8","doi-asserted-by":"publisher","unstructured":"[8] B. C. Paul, S. Fujita and M. Okajima: IEEE J. Solid-State Circuits <b>44<\/b> (2009) 2935. DOI:10.1109\/JSSC.2009.2028928","DOI":"10.1109\/JSSC.2009.2028928"},{"key":"9","doi-asserted-by":"crossref","unstructured":"[9] V. Kunchigi, L. Kulkarni and S. Kulkarni: ICDCS (2012) 360. DOI:10.1109\/ICDCSyst.2012.6188747","DOI":"10.1109\/ICDCSyst.2012.6188747"},{"key":"10","doi-asserted-by":"publisher","unstructured":"[10] H. Mora-Mora, J. Mora Pascual, J. L. Sanchez Romero and J. M. Garcia Chamazo: Integration, VLSI J. <b>41<\/b> (2008) 557. DOI:10.1016\/j.vlsi.2008.01.005","DOI":"10.1016\/j.vlsi.2008.01.005"},{"key":"11","doi-asserted-by":"publisher","unstructured":"[11] V. G. Oklobdzija, D. Villeger and S. S. Liu: IEEE Trans. Comput. <b>45<\/b> (1996) 294. DOI:10.1109\/12.485568","DOI":"10.1109\/12.485568"},{"key":"12","doi-asserted-by":"crossref","unstructured":"[12] A. Edirisuriya, A. Madanayake, J. Adikari and V. S. Dimitrov: MWSCAS (2011) 1. DOI:10.1109\/MWSCAS.2011.6026309","DOI":"10.1109\/MWSCAS.2011.6026309"},{"key":"13","doi-asserted-by":"crossref","unstructured":"[13] P. Bulic, Z. Babic and A. Avramovic: ICCD (2010) 235.","DOI":"10.1109\/ICCD.2010.5647767"},{"key":"14","doi-asserted-by":"crossref","unstructured":"[14] S. Bhattacharjee, S. Sil, B. Basak and A. Chakrabarti: ICCIA (2011) 1. DOI:10.1109\/ICCIndA.2011.6146691","DOI":"10.1109\/ICCIndA.2011.6146691"}],"container-title":["IEICE Electronics Express"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/12\/16\/12_12.20150450\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,5,29]],"date-time":"2025-05-29T15:50:24Z","timestamp":1748533824000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/12\/16\/12_12.20150450\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015]]},"references-count":14,"journal-issue":{"issue":"16","published-print":{"date-parts":[[2015]]}},"URL":"https:\/\/doi.org\/10.1587\/elex.12.20150450","relation":{},"ISSN":["1349-2543"],"issn-type":[{"value":"1349-2543","type":"electronic"}],"subject":[],"published":{"date-parts":[[2015]]}}}