{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,23]],"date-time":"2024-09-23T03:58:33Z","timestamp":1727063913614},"reference-count":11,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"2","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Electron. Express"],"published-print":{"date-parts":[[2017]]},"DOI":"10.1587\/elex.13.20160911","type":"journal-article","created":{"date-parts":[[2016,12,19]],"date-time":"2016-12-19T22:12:10Z","timestamp":1482185530000},"page":"20160911-20160911","source":"Crossref","is-referenced-by-count":7,"title":["A transient pulse dually filterable and online self-recoverable latch"],"prefix":"10.1587","volume":"14","author":[{"given":"Aibin","family":"Yan","sequence":"first","affiliation":[{"name":"School of Computer Science and Technology, Anhui University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Huaguo","family":"Liang","sequence":"additional","affiliation":[{"name":"School of Electronic Science & Applied Physics, Hefei University of Technology"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yingchun","family":"Lu","sequence":"additional","affiliation":[{"name":"School of Electronic Science & Applied Physics, Hefei University of Technology"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zhengfeng","family":"Huang","sequence":"additional","affiliation":[{"name":"School of Electronic Science & Applied Physics, Hefei University of Technology"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"532","reference":[{"key":"1","doi-asserted-by":"publisher","unstructured":"[1] Y. Liet al.: \u201cOvercoming early-life failure and aging for robust systems,\u201d IEEE Des. Test Comput. <b>26<\/b> (2009) 28 (DOI: 10.1109\/MDT.2009.152).","DOI":"10.1109\/MDT.2009.152"},{"key":"2","doi-asserted-by":"publisher","unstructured":"[2] V. Ferlet-Cavroiset al.: \u201cSingle event transients in digital CMOS \u2014 A review,\u201d IEEE Trans. Nucl. Sci. <b>60<\/b> (2013) 1767 (DOI: 10.1109\/TNS.2013.2255624).","DOI":"10.1109\/TNS.2013.2255624"},{"key":"3","doi-asserted-by":"publisher","unstructured":"[3] S. Linet al.: \u201cDesign and performance evaluation of radiation hardened latches for nanoscale CMOS,\u201d IEEE Trans. Very Large Scale Integr. (VLSI) Syst. <b>19<\/b> (2011) 1315 (DOI: 10.1109\/TVLSI.2010.2047954).","DOI":"10.1109\/TVLSI.2010.2047954"},{"key":"4","doi-asserted-by":"publisher","unstructured":"[4] H. K. Alidash and V. G. Oklobdzija: \u201cLow-power soft error hardened latch,\u201d J. Low Power Electron. <b>6<\/b> (2010) 218 (DOI: 10.1166\/jolpe.2010.1073).","DOI":"10.1166\/jolpe.2010.1073"},{"key":"5","doi-asserted-by":"publisher","unstructured":"[5] H. Nanet al.: \u201cHigh performance, low cost, and robust soft error tolerant latches for nanoscale CMOS technology,\u201d IEEE Trans. Circuits Syst. I <b>59<\/b> (2012) 1445 (DOI: 10.1109\/TCSI.2011.2177135).","DOI":"10.1109\/TCSI.2011.2177135"},{"key":"6","doi-asserted-by":"publisher","unstructured":"[6] Z. Huanget al.: \u201cA high performance SEU tolerant latch,\u201d J. Electron. Test. <b>31<\/b> (2015) 349 (DOI: 10.1007\/s10836-015-5533-5).","DOI":"10.1007\/s10836-015-5533-5"},{"key":"7","doi-asserted-by":"publisher","unstructured":"[7] A. Yanet al.: \u201cA self-recoverable, frequency-aware and cost-effective robust latch for nanoscale CMOS technology,\u201d IEICE Trans. Electron. <b>E98-C<\/b> (2015) 1171 (DOI: 10.1587\/transele.E98.C.1171).","DOI":"10.1587\/transele.E98.C.1171"},{"key":"8","doi-asserted-by":"publisher","unstructured":"[8] A. Yanet al.: \u201cHigh-performance, low-cost, and highly reliable radiation hardened latch,\u201d Electron. Lett. <b>52<\/b> (2016) 139 (DOI: 10.1049\/el.2015.3020).","DOI":"10.1049\/el.2015.3020"},{"key":"9","doi-asserted-by":"publisher","unstructured":"[9] R. Rajaeiet al.: \u201cLow cost soft error hardened latches for nano-scale CMOS technology in presence of process variation,\u201d Microelectron. Reliab. <b>53<\/b> (2013) 912 (DOI: 10.1016\/j.microrel.2013.02.012).","DOI":"10.1016\/j.microrel.2013.02.012"},{"key":"10","doi-asserted-by":"publisher","unstructured":"[10] C. Qiet al.: \u201cLow cost and highly reliable radiation hardened latch in 65 nm CMOS technology,\u201d Microelectron. Reliab. <b>55<\/b> (2015) 863 (DOI: 10.1016\/j.microrel.2015.03.014).","DOI":"10.1016\/j.microrel.2015.03.014"},{"key":"11","unstructured":"[11] Predictive Technology Model (PTM) for SPICE http:\/\/ptm.asu.edu\/."}],"container-title":["IEICE Electronics Express"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/14\/2\/14_13.20160911\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,1,28]],"date-time":"2017-01-28T03:27:08Z","timestamp":1485574028000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/14\/2\/14_13.20160911\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017]]},"references-count":11,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2017]]}},"URL":"https:\/\/doi.org\/10.1587\/elex.13.20160911","relation":{},"ISSN":["1349-2543"],"issn-type":[{"value":"1349-2543","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017]]}}}