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Kocher, <i>et al.<\/i>: U.S. Patent 7587044 (2009)."},{"key":"6","doi-asserted-by":"publisher","unstructured":"[6] T. G\u00fcneysu and A. Moradi: \u201cGeneric side-channel countermeasures for reconfigurable devices,\u201d CHES (2011) 33 (DOI: 10.1007\/978-3-642-23951-9_3).","DOI":"10.1007\/978-3-642-23951-9_3"},{"key":"7","unstructured":"[7] S. Mangard: \u201cHardware countermeasures against DPA - A statistical analysis of their effectiveness,\u201d Topics in Cryptology - CT-RSA (2004) 222 (DOI: 10.1007\/978-3-540-24660-2_18)."},{"key":"8","unstructured":"[8] S. Nagashima, <i>et al.<\/i>: \u201cDPA using phase-based waveform matching against random-delay countermeasure,\u201d ISCAS (2007) 1807 (DOI: 10.1109\/ISCAS.2007.378024)."},{"key":"9","unstructured":"[9] S. Mangard, <i>et al.<\/i>: <i>Power Analysis Attacks: Revealing the Secrets of Smart Cards<\/i> (Springer, US, 2010) 209."},{"key":"10","unstructured":"[10] Q. Tian and S. A. Huss: \u201cA general approach to power trace alignment for the assessment of side-channel resistance of hardened cryptosystems,\u201d Eighth International Conference on Intelligent Information Hiding and Multimedia Signal Processing (2012) 465 (DOI: 10.1109\/IIH-MSP.2012.119)."},{"key":"11","unstructured":"[11] J. G. J. van Woudenberg, <i>et al.<\/i>: \u201cImproving differential power analysis by elastic alignment,\u201d Topics in Cryptology - CT-RSA (2011) 104 (DOI: 10.1007\/978-3-642-19074-2_8)."},{"key":"12","unstructured":"[12] L. Benini, <i>et al.<\/i>: \u201cEnergy-aware design techniques for differential power analysis protection,\u201d Proc. of the 40th Annual Design Automation Conference (2003) 36 (DOI: 10.1145\/775832.775845)."},{"key":"13","unstructured":"[13] K. Tiri, <i>et al.<\/i>: \u201cA dynamic and differential CMOS logic with signal independent power consumption to withstand differential power analysis on smart cards,\u201d ESSCIRC (2002) 403."},{"key":"14","unstructured":"[14] M. Kar, <i>et al.<\/i>: \u201cImproved power-side-channel-attack resistance of an AES-128 core via a security-aware integrated buck voltage regulator,\u201d ISSCC Dig. Tech. Papers (2017) 142 (DOI: 10.1109\/ISSCC.2017.7870301)."},{"key":"15","unstructured":"[15] S. Yang, <i>et al.<\/i>: \u201cPower attack resistant cryptosystem design: A dynamic voltage and frequency switching approach,\u201d Proc. of the Conference on Design, Automation and Test in Europe (2005) 64 (DOI: 10.1109\/DATE.2005.241)."},{"key":"16","unstructured":"[16] K. Baddam and M. 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