{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,28]],"date-time":"2025-06-28T06:44:39Z","timestamp":1751093079104},"reference-count":12,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"8","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Electron. Express"],"published-print":{"date-parts":[[2018]]},"DOI":"10.1587\/elex.15.20180195","type":"journal-article","created":{"date-parts":[[2018,4,10]],"date-time":"2018-04-10T22:15:35Z","timestamp":1523398535000},"page":"20180195-20180195","source":"Crossref","is-referenced-by-count":5,"title":["Improved gradient descent bit flipping decoder for LDPC codes on BSC channel"],"prefix":"10.1587","volume":"15","author":[{"given":"Dao","family":"Ren","sequence":"first","affiliation":[{"name":"School of Electrical Science and Engineering, Nanjing University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jin","family":"Sha","sequence":"additional","affiliation":[{"name":"Shenzhen Research Institute, Nanjing University"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"532","reference":[{"key":"1","doi-asserted-by":"publisher","unstructured":"[1] R. G. Gallager: \u201cLow-density parity-check codes,\u201d IRE Trans. Inf. Theory <b>8<\/b> (1962) 21 (DOI: 10.1109\/TIT.1962.1057683).","DOI":"10.1109\/TIT.1962.1057683"},{"key":"2","doi-asserted-by":"publisher","unstructured":"[2] S.-Y. Chung, <i>et al.<\/i>: \u201cOn the design of low-density parity-check codes within 0.0045 dB of the Shannon limit,\u201d IEEE Commun. Lett. <b>5<\/b> (2001) 58 (DOI: 10.1109\/4234.905935).","DOI":"10.1109\/4234.905935"},{"key":"3","doi-asserted-by":"publisher","unstructured":"[3] M. Jiang, <i>et al.<\/i>: \u201cAn improvement on the modified weighted bit flipping decoding algorithm for LDPC codes,\u201d IEEE Commun. Lett. <b>9<\/b> (2005) 814 (DOI: 10.1109\/LCOMM.2005.1506712).","DOI":"10.1109\/LCOMM.2005.1506712"},{"key":"4","doi-asserted-by":"publisher","unstructured":"[4] J. Zhang and M. P. C. Fossorier: \u201cA modified weighted bit-flipping decoding of low-density parity-check codes,\u201d IEEE Commun. Lett. <b>8<\/b> (2004) 165 (DOI: 10.1109\/LCOMM.2004.825737).","DOI":"10.1109\/LCOMM.2004.825737"},{"key":"5","doi-asserted-by":"publisher","unstructured":"[5] X. Wu, <i>et al.<\/i>: \u201cParallel weighted bit-flipping decoding,\u201d IEEE Commun. Lett. <b>11<\/b> (2007) 1089 (DOI: 10.1109\/LCOMM.2007.070269).","DOI":"10.1109\/LCOMM.2007.070269"},{"key":"6","doi-asserted-by":"publisher","unstructured":"[6] M. Shan, <i>et al.<\/i>: \u201cImproved weighted bit-flipping algorithm for decoding LDPC codes,\u201d IEE Proc. Commun. <b>152<\/b> (2005) 919 (DOI: 10.1049\/ip-com:20045118).","DOI":"10.1049\/ip-com:20045118"},{"key":"7","doi-asserted-by":"publisher","unstructured":"[7] T. Wadayama, <i>et al.<\/i>: \u201cGradient descent bit flipping algorithms for decoding LDPC codes,\u201d IEEE Trans. Commun. <b>58<\/b> (2010) 1610 (DOI: 10.1109\/TCOMM.2010.06.090046).","DOI":"10.1109\/TCOMM.2010.06.090046"},{"key":"8","doi-asserted-by":"publisher","unstructured":"[8] O. Rasheed, <i>et al.<\/i>: \u201cFault-tolerant probabilistic gradient-descent bit flipping decoder,\u201d IEEE Commun. Lett. <b>18<\/b> (2014) 1487 (DOI: 10.1109\/LCOMM.2014.2344031).","DOI":"10.1109\/LCOMM.2014.2344031"},{"key":"9","unstructured":"[9] K. Le, <i>et al.<\/i>: \u201cA novel high-throughput, low-complexity bit-flipping decoder for LDPC codes,\u201d 2017 International Conference on Advanced Technologies for Communications (ATC) (2017) 127 (DOI: 10.1109\/ATC.2017.8167601)."},{"key":"10","unstructured":"[10] S. K. Chilappagari, <i>et al.<\/i>: \u201cError floors of LDPC codes on the binary symmetric channel,\u201d 2006 IEEE International Conference on Communications (2006) 1089 (DOI: 10.1109\/ICC.2006.254892)."},{"key":"11","unstructured":"[11] K. Le, <i>et al.<\/i>: \u201cEfficient realization of probabilistic gradient descent bit flipping decoders,\u201d 2015 IEEE International Symposium on Circuits and Systems (ISCAS) (2015) 1494 (DOI: 10.1109\/ISCAS.2015.7168928)."},{"key":"12","doi-asserted-by":"publisher","unstructured":"[12] K. Le, <i>et al.<\/i>: \u201cEfficient hardware implementation of probabilistic gradient descent bit-flipping,\u201d IEEE Trans. Circuits Syst. I, Reg. Papers <b>64<\/b> (2017) 906 (DOI: 10.1109\/TCSI.2016.2633581).","DOI":"10.1109\/TCSI.2016.2633581"}],"container-title":["IEICE Electronics Express"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/15\/8\/15_15.20180195\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2018,4,28]],"date-time":"2018-04-28T04:24:29Z","timestamp":1524889469000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/15\/8\/15_15.20180195\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018]]},"references-count":12,"journal-issue":{"issue":"8","published-print":{"date-parts":[[2018]]}},"URL":"https:\/\/doi.org\/10.1587\/elex.15.20180195","relation":{},"ISSN":["1349-2543"],"issn-type":[{"value":"1349-2543","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018]]}}}