{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,4]],"date-time":"2022-04-04T21:53:21Z","timestamp":1649109201594},"reference-count":14,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"5","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Electron. Express"],"published-print":{"date-parts":[[2019]]},"DOI":"10.1587\/elex.16.20181151","type":"journal-article","created":{"date-parts":[[2019,2,14]],"date-time":"2019-02-14T22:39:50Z","timestamp":1550183990000},"page":"20181151-20181151","source":"Crossref","is-referenced-by-count":0,"title":["A new method to improve the phase noise performance of the frequency synthesizer for UHF RFID"],"prefix":"10.1587","volume":"16","author":[{"given":"Qingshan","family":"Liu","sequence":"first","affiliation":[{"name":"Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials and Devices, School of Microelectronics, Xidian University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Changchun","family":"Chai","sequence":"additional","affiliation":[{"name":"Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials and Devices, School of Microelectronics, Xidian University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yuqian","family":"Liu","sequence":"additional","affiliation":[{"name":"Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials and Devices, School of Microelectronics, Xidian University"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"532","reference":[{"key":"1","unstructured":"[1] P. Tian, <i>et al.<\/i>: \u201cA novel blocker rejection receiver front-end for single-chip UHF RFID reader,\u201d IEEE International Conference on Microwave and Millimeter Wave Technology <b>2<\/b> (2016) 982 (DOI: 10.1109\/ICMMT.2016.7762507)."},{"key":"2","doi-asserted-by":"publisher","unstructured":"[2] W. Wang and H. C. Luong: \u201cA 0.8-V 4.9 mW 1.2-GHz CMOS fractional-N frequency synthesizer for UHF RFID readers,\u201d IEEE Trans. Circuits Syst. I, Reg. Papers <b>55<\/b> (2008) 2505 (DOI: 10.1109\/TCSI.2008.921064).","DOI":"10.1109\/TCSI.2008.921064"},{"key":"3","unstructured":"[3] M.-S. Kim, <i>et al.<\/i>: \u201cLow phase noise CMOS VCO for UHF RFID reader system,\u201d Proc. Asia-Pacific Microwave Conference (2011) 777."},{"key":"4","doi-asserted-by":"crossref","unstructured":"[4] Y. Zhang, <i>et al.<\/i>: \u201cA broadband highly linear 3.5\u20136 GHz CMOS VCO for multi-standard wireless transceivers,\u201d IEEE ICCT (2012) 380 (DOI: 10.1109\/ICCT.2012.6511247).","DOI":"10.1109\/ICCT.2012.6511247"},{"key":"5","doi-asserted-by":"crossref","unstructured":"[5] K.-J. Hsiao: \u201cA 32.4 ppm\/\u00b0C 3.2\u20131. 6V self-chopped relaxation oscillator with adaptive supply generation,\u201d Dig. Symp. VLSI Circuits (2012) 14 (DOI: 10.1109\/VLSIC.2012.6243766).","DOI":"10.1109\/VLSIC.2012.6243766"},{"key":"6","doi-asserted-by":"publisher","unstructured":"[6] A. Burdett: \u201cUltra-low-power wireless systems: Energy-efficient radios for the internet of things,\u201d IEEE Solid State Circuits Mag. <b>7<\/b> (2015) 18 (DOI: 10.1109\/MSSC.2015.2417095).","DOI":"10.1109\/MSSC.2015.2417095"},{"key":"7","doi-asserted-by":"crossref","unstructured":"[7] B. Saeidi, <i>et al.<\/i>: \u201cA wide-range VCO with optimum temperature adaptive tuning,\u201d IEEE RFIC (2010) 337 (DOI: 10.1109\/RFIC.2010.5477264).","DOI":"10.1109\/RFIC.2010.5477264"},{"key":"8","doi-asserted-by":"crossref","unstructured":"[8] V. Ravinuthula and S. Finocchiaro: \u201cA low power high performance PLL with temperature compensated VCO in 65 nm CMOS,\u201d Radio Frequency Integrated Circuits Symposium (2016) 31 (DOI: 10.1109\/RFIC.2016.7508243).","DOI":"10.1109\/RFIC.2016.7508243"},{"key":"9","doi-asserted-by":"publisher","unstructured":"[9] T. Liu, <i>et al.<\/i>: \u201cA temperature compensated triple-path PLL with KVCO non-linearity desensitization capable of operating at 77 K,\u201d IEEE Trans. Circuits Syst. I, Reg. Papers <b>64<\/b> (2017) 2835 (DOI: 10.1109\/TCSI.2017.2704023).","DOI":"10.1109\/TCSI.2017.2704023"},{"key":"10","doi-asserted-by":"publisher","unstructured":"[10] H. Gao, <i>et al.<\/i>: \u201cA fractional-N PLL with small KVCO wide-band LC-VCO and current matching CP for M-DTV systems,\u201d Int. J. Electron. <b>98<\/b> (2011) 769 (DOI: 10.1080\/00207217.2011.567033).","DOI":"10.1080\/00207217.2011.567033"},{"key":"11","doi-asserted-by":"crossref","unstructured":"[11] A. C. Kailuke, <i>et al.<\/i>: \u201cDesign of phase frequency detector and charge pump for low voltage high frequency PLL,\u201d 2014 International Conference on Electronic Systems, Signal Processing and Computing Technologies (2014) (DOI: 10.1109\/ICESC.2014.21).","DOI":"10.1109\/ICESC.2014.21"},{"key":"12","doi-asserted-by":"publisher","unstructured":"[12] V. K. Manthena, <i>et al.<\/i>: \u201cA low-power single-phase clock multiband flexible divider,\u201d IEEE Trans. Very Large Scale Integr. (VLSI) Syst. <b>20<\/b> (2012) 376 (DOI: 10.1109\/TVLSI.2010.2100052).","DOI":"10.1109\/TVLSI.2010.2100052"},{"key":"13","unstructured":"[13] M. Zackriya V., <i>et al.<\/i>: \u201cA low power dual modulus prescaler for fractional-N PLL synthesizer,\u201d International Conference on Electronics &amp; Communication Systems (2014) (DOI: 10.1109\/ECS.2014.6892664)."},{"key":"14","doi-asserted-by":"publisher","unstructured":"[14] M. Zanuso, <i>et al.<\/i>: \u201cA wideband 3.6 GHz digital \u0394\u03a3 fractional-N PLL with phase interpolation divider and digital spur cancellation,\u201d IEEE J. Solid-State Circuits <b>46<\/b> (2011) 627 (DOI: 10.1109\/JSSC.2010.2104270).","DOI":"10.1109\/JSSC.2010.2104270"}],"container-title":["IEICE Electronics Express"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/16\/5\/16_16.20181151\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,3,16]],"date-time":"2019-03-16T04:52:05Z","timestamp":1552711925000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/16\/5\/16_16.20181151\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019]]},"references-count":14,"journal-issue":{"issue":"5","published-print":{"date-parts":[[2019]]}},"URL":"https:\/\/doi.org\/10.1587\/elex.16.20181151","relation":{},"ISSN":["1349-2543"],"issn-type":[{"value":"1349-2543","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019]]}}}