{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,7,20]],"date-time":"2024-07-20T07:13:29Z","timestamp":1721459609203},"reference-count":32,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"14","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Electron. Express"],"published-print":{"date-parts":[[2019]]},"DOI":"10.1587\/elex.16.20190317","type":"journal-article","created":{"date-parts":[[2019,6,25]],"date-time":"2019-06-25T22:03:41Z","timestamp":1561500221000},"page":"20190317-20190317","source":"Crossref","is-referenced-by-count":2,"title":["A new area and power efficient DCT circuits using sporadic logarithmic shifters"],"prefix":"10.1587","volume":"16","author":[{"given":"Jiajia","family":"Chen","sequence":"first","affiliation":[{"name":"Nanjing University of Aeronautics and Astronautics"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yujia","family":"Wang","sequence":"additional","affiliation":[{"name":"Singapore University of Technology and Design"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Juan","family":"Zhao","sequence":"additional","affiliation":[{"name":"Singapore University of Technology and Design"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Susanto","family":"Rahardja","sequence":"additional","affiliation":[{"name":"Singapore Northwestern Polytechnical University"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"532","reference":[{"key":"1","doi-asserted-by":"publisher","unstructured":"[1] G. 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Bross, <i>et al.<\/i>: High Efficiency Video Coding (HEVC) Text Specification Draft 10 (for FDIS and Consent), JCT-VC L1003 (2013)."},{"key":"9","doi-asserted-by":"publisher","unstructured":"[9] P. K. Meher, <i>et al.<\/i>: \u201cEfficient integer DCT architectures for HEVC,\u201d IEEE Trans. Circuits Syst. Video Technol. <b>24<\/b> (2014) 168 (DOI: 10.1109\/TCSVT.2013.2276862).","DOI":"10.1109\/TCSVT.2013.2276862"},{"key":"10","doi-asserted-by":"publisher","unstructured":"[10] H. Liang, <i>et al.<\/i>: \u201cArea-efficient HEVC IDCT\/IDST architecture for 8K \u00d7 4K video decoding,\u201d IEICE Electron. Express <b>13<\/b> (2016) 20160019 (DOI: 10.1587\/elex.13.20160019).","DOI":"10.1587\/elex.13.20160019"},{"key":"11","doi-asserted-by":"publisher","unstructured":"[11] N. Rajapaksha, <i>et al.<\/i>: \u201cVLSI computational architectures for the arithmetic cosine transform,\u201d IEEE Trans. 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Express <b>10<\/b> (2013) 20130319 (DOI: 10.1587\/elex.10.20130319).","DOI":"10.1587\/elex.10.20130319"},{"key":"16","doi-asserted-by":"publisher","unstructured":"[16] V. de A. Coutinho, <i>et al.<\/i>: \u201cLow-complexity multidimensional DCT approximations for high-order tensor data decorrelation,\u201d IEEE Trans. Image Process. <b>26<\/b> (2017) 2296 (DOI: 10.1109\/TIP.2017.2679442).","DOI":"10.1109\/TIP.2017.2679442"},{"key":"17","doi-asserted-by":"publisher","unstructured":"[17] R. J. Cintra: \u201cAn integer approximation method for discrete sinusoidal transforms,\u201d Circuits Syst. Signal Process. <b>30<\/b> (2011) 1481 (DOI: 10.1007\/s00034-011-9318-5).","DOI":"10.1007\/s00034-011-9318-5"},{"key":"18","doi-asserted-by":"publisher","unstructured":"[18] R. J. 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Circuits Syst. <b>37<\/b> (2018) 896 (DOI: 10.1109\/TCAD.2017.2740300).","DOI":"10.1109\/TCAD.2017.2740300"},{"key":"25","unstructured":"[25] R. Rajalakshmi and P. A. Priya: \u201cDesign and analysis of a 4-bit low power universal barrel-shifter in 16 nm FinFET technology,\u201d IEEE ICACCCT (2014) 527 (DOI: 10.1109\/ICACCCT.2014.7019141)."},{"key":"26","doi-asserted-by":"publisher","unstructured":"[26] J. Y. S. Low and C.-H. Chang: \u201cA VLSI efficient programmable power-of-two scaler for {2<i><sup>n<\/sup><\/i> \u2212 1, 2<i><sup>n<\/sup><\/i>, 2<i><sup>n<\/sup><\/i> + 1} RNS,\u201d IEEE Trans. Circuits Syst. I, Reg. Papers <b>59<\/b> (2012) 2911 (DOI: 10.1109\/TCSI.2012.2206491).","DOI":"10.1109\/TCSI.2012.2206491"},{"key":"27","doi-asserted-by":"publisher","unstructured":"[27] V. S. Dimitrov, <i>et al.<\/i>: \u201cTheory and applications of the double-base number system,\u201d IEEE Trans. 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Circuits Syst. <b>35<\/b> (2016) 1605 (DOI: 10.1109\/TCAD.2016.2527700).","DOI":"10.1109\/TCAD.2016.2527700"}],"container-title":["IEICE Electronics Express"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/16\/14\/16_16.20190317\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,7,20]],"date-time":"2024-07-20T06:40:59Z","timestamp":1721457659000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/16\/14\/16_16.20190317\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019]]},"references-count":32,"journal-issue":{"issue":"14","published-print":{"date-parts":[[2019]]}},"URL":"https:\/\/doi.org\/10.1587\/elex.16.20190317","relation":{},"ISSN":["1349-2543"],"issn-type":[{"value":"1349-2543","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019]]}}}