{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,31]],"date-time":"2025-03-31T17:06:34Z","timestamp":1743440794712},"reference-count":31,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"13","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Electron. Express"],"published-print":{"date-parts":[[2019]]},"DOI":"10.1587\/elex.16.20190346","type":"journal-article","created":{"date-parts":[[2019,6,16]],"date-time":"2019-06-16T22:02:53Z","timestamp":1560722573000},"page":"20190346-20190346","source":"Crossref","is-referenced-by-count":9,"title":["RoR: A low insertion loss design of rearrangeable hybrid photonic-plasmonic 6 \u00d7 6 non-blocking router for ONoCs"],"prefix":"10.1587","volume":"16","author":[{"given":"Muhammad Rehan","family":"Yahya","sequence":"first","affiliation":[{"name":"College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ning","family":"Wu","sequence":"additional","affiliation":[{"name":"College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Gaizhen","family":"Yan","sequence":"additional","affiliation":[{"name":"College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics"},{"name":"School of Electrical and Electronic Engineering, Anhui Science and Technology University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Fen","family":"Ge","sequence":"additional","affiliation":[{"name":"College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tanveer","family":"Ahmed","sequence":"additional","affiliation":[{"name":"College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"532","reference":[{"key":"1","doi-asserted-by":"publisher","unstructured":"[1] M. Stucchi, <i>et al.<\/i>: \u201cOn-chip optical interconnects versus electrical interconnects for high-performance applications,\u201d Microelectron. Eng. <b>112<\/b> (2013) 84 (DOI: 10.1016\/j.mee.2013.03.080).","DOI":"10.1016\/j.mee.2013.03.080"},{"key":"2","doi-asserted-by":"publisher","unstructured":"[2] Y. Zhang, <i>et al.<\/i>: \u201cA CMOS-compatible, low-loss, and low-crosstalk silicon waveguide crossing,\u201d IEEE Photon. Technol. Lett. <b>25<\/b> (2013) 422 (DOI: 10.1109\/LPT.2013.2241049).","DOI":"10.1109\/LPT.2013.2241049"},{"key":"3","doi-asserted-by":"publisher","unstructured":"[3] S. Werner, <i>et al.<\/i>: \u201cA survey on optical network-on-chip architectures,\u201d ACM Comput. Surv. <b>50<\/b> (2018) 89 (DOI: 10.1145\/3131346).","DOI":"10.1145\/3131346"},{"key":"4","doi-asserted-by":"publisher","unstructured":"[4] M. Bahadori, <i>et al.<\/i>: \u201cComprehensive design space exploration of silicon photonic interconnects,\u201d J. Lightw. Technol. <b>34<\/b> (2016) 2975 (DOI: 10.1109\/JLT.2015.2503120).","DOI":"10.1109\/JLT.2015.2503120"},{"key":"5","unstructured":"[5] M. R. Yahya: \u201cReview of photonic and hybrid on chip interconnects for MPSoCs in IoT paradigm,\u201d 2018 21st Saudi Computer Society National Computer Conference (NCC) (2018) (DOI: 10.1109\/NCG.2018.8593055)."},{"key":"6","doi-asserted-by":"publisher","unstructured":"[6] S. Rumley, <i>et al.<\/i>: \u201cOptical interconnects for extreme scale computing systems,\u201d Parallel Comput. <b>64<\/b> (2017) 65 (DOI: 10.1016\/j.parco.2017.02.001).","DOI":"10.1016\/j.parco.2017.02.001"},{"key":"7","doi-asserted-by":"publisher","unstructured":"[7] M. Meyer, <i>et al.<\/i>: \u201cMicroring fault-resilient photonic network-on-chip for reliable high-performance many-core systems,\u201d J. Supercomput. <b>73<\/b> (2017) 1567 (DOI: 10.1007\/s11227-016-1846-0).","DOI":"10.1007\/s11227-016-1846-0"},{"key":"8","unstructured":"[8] E. Yaghoubi and M. Reshadi: \u201cFive-port optical router design based on Mach-Zehnder switches for photonic networks-on-chip,\u201d J. Adv. Comput. Res. (2016)."},{"key":"9","doi-asserted-by":"publisher","unstructured":"[9] T. Zhou, <i>et al.<\/i>: \u201cRearrangeable-nonblocking five-port silicon optical switch for 2-D-mesh network on chip,\u201d IEEE Photon. J. <b>10<\/b> (2018) 6601208 (DOI: 10.1109\/JPHOT.2018.2841401).","DOI":"10.1109\/JPHOT.2018.2841401"},{"key":"10","doi-asserted-by":"publisher","unstructured":"[10] X. Li, <i>et al.<\/i>: \u201cMach-Zehnder-based five-port silicon router for optical interconnects,\u201d Opt. Lett. <b>38<\/b> (2013) 1703 (DOI: 10.1364\/ol.38.001703).","DOI":"10.1364\/OL.38.001703"},{"key":"11","doi-asserted-by":"publisher","unstructured":"[11] Y. Zhao, <i>et al.<\/i>: \u201cFive-port silicon optical router based on Mach-Zehnder optical switches for photonic networks-on-chip,\u201d J. Semicond. <b>37<\/b> (2016) 114008 (DOI: 10.1088\/1674-4926\/37\/11\/114008).","DOI":"10.1088\/1674-4926\/37\/11\/114008"},{"key":"12","doi-asserted-by":"publisher","unstructured":"[13] R. Ji, <i>et al.<\/i>: \u201cFive-port optical router based on microring switches for photonic networks-on-chip,\u201d IEEE Photon. Technol. Lett. <b>25<\/b> (2013) 492 (DOI: 10.1109\/LPT.2013.2243427).","DOI":"10.1109\/LPT.2013.2243427"},{"key":"13","doi-asserted-by":"publisher","unstructured":"[14] L. Huang, <i>et al.<\/i>: \u201cPanzer: A 6 \u00d7 6 photonic router for optical network on chip,\u201d IEICE Electron. Express <b>13<\/b> (2016) 20160719 (DOI: 10.1587\/elex.13.20160719).","DOI":"10.1587\/elex.13.20160719"},{"key":"14","doi-asserted-by":"publisher","unstructured":"[15] E. Yaghoubi, <i>et al.<\/i>: \u201cMach-Zehnder-based optical router design for photonic networks on chip,\u201d Opt. Eng. <b>54<\/b> (2015) 035102 (DOI: 10.1117\/1.OE.54.3.035102).","DOI":"10.1117\/1.OE.54.3.035102"},{"key":"15","doi-asserted-by":"publisher","unstructured":"[16] M. Geng, <i>et al.<\/i>: \u201cN-port strictly non-blocking optical router based on Mach-Zehnder optical switch for photonic networks-on-chip,\u201d Opt. Commun. <b>383<\/b> (2017) 472 (DOI: 10.1016\/j.optcom.2016.09.023).","DOI":"10.1016\/j.optcom.2016.09.023"},{"key":"16","doi-asserted-by":"publisher","unstructured":"[17] R. Min, <i>et al.<\/i>: \u201cA universal method for constructing N-port non-blocking optical router based on microring resonators,\u201d J. Lightw. Technol. <b>30<\/b> (2012) 3736 (DOI: 10.1109\/JLT.2012.2227945).","DOI":"10.1109\/JLT.2012.2227945"},{"key":"17","doi-asserted-by":"publisher","unstructured":"[18] Q. Chen, <i>et al.<\/i>: \u201cUniversal method for constructing <i>N<\/i>-port non-blocking optical router based on 2 \u00d7 2 optical switch for photonic networks-on-chip,\u201d Opt. Express <b>22<\/b> (2014) 12614 (DOI: 10.1364\/OE.22.012614).","DOI":"10.1364\/OE.22.012614"},{"key":"18","doi-asserted-by":"publisher","unstructured":"[19] N. Sherwood-Droz, <i>et al.<\/i>: \u201cUniversal method for designing non-blocking multicast-supported on chip optical router,\u201d IEICE Electron. Express (2009) (DOI: 10.1364\/oe.16.019395).","DOI":"10.1364\/OE.16.019395"},{"key":"19","doi-asserted-by":"publisher","unstructured":"[20] T. Zhou and H. Jia: \u201cMethod to optimize optical switch topology for photonic network-on-chip,\u201d Opt. Commun. <b>413<\/b> (2018) 230 (DOI: 10.1016\/j.optcom.2017.12.062).","DOI":"10.1016\/j.optcom.2017.12.062"},{"key":"20","doi-asserted-by":"publisher","unstructured":"[21] N. Dupuis and B. G. Lee: \u201cImpact of topology on the scalability of Mach-Zehnder-based multistage silicon photonic switch networks,\u201d J. Lightw. Technol. <b>36<\/b> (2018) 763 (DOI: 10.1109\/JLT.2017.2775563).","DOI":"10.1109\/JLT.2017.2775563"},{"key":"21","doi-asserted-by":"publisher","unstructured":"[22] B. G. Lee and N. Dupuis: \u201cSilicon photonic switch fabrics: Technology and architecture,\u201d J. Lightw. Technol. <b>37<\/b> (2019) 6 (DOI: 10.1109\/JLT.2018.2876828).","DOI":"10.1109\/JLT.2018.2876828"},{"key":"22","doi-asserted-by":"publisher","unstructured":"[23] A. Jajszczyk: \u201cRearrangeable Clos networks: Fifty years of the theory evolution,\u201d IEEE Commun. Mag. <b>41<\/b> (2003) 28 (DOI: 10.1109\/MCOM.2003.1235591).","DOI":"10.1109\/MCOM.2003.1235591"},{"key":"23","doi-asserted-by":"publisher","unstructured":"[24] W. Kabaci\u0144ski, <i>et al.<\/i>: \u201cNecessary and sufficient conditions for the rearrangeability of WSW1 switching fabrics,\u201d IEEE Access <b>7<\/b> (2019) 18622 (DOI: 10.1109\/ACCESS.2019.2896283).","DOI":"10.1109\/ACCESS.2019.2896283"},{"key":"24","doi-asserted-by":"publisher","unstructured":"[25] S. Sun, <i>et al.<\/i>: \u201cHybrid photonic-plasmonic nonblocking broadband 5 \u00d7 5 router for optical networks,\u201d IEEE Photon. J. <b>10<\/b> (2018) 4900312 (DOI: 10.1109\/JPHOT.2017.2766087).","DOI":"10.1109\/JPHOT.2017.2766087"},{"key":"25","doi-asserted-by":"publisher","unstructured":"[26] C. A. Thraskias, <i>et al.<\/i>: \u201cSurvey of photonic and plasmonic interconnect technologies for intra-datacenter and high-performance computing communications,\u201d IEEE Commun. Surveys Tuts. <b>20<\/b> (2018) 2758 (DOI: 10.1109\/COMST.2018.2839672).","DOI":"10.1109\/COMST.2018.2839672"},{"key":"26","doi-asserted-by":"publisher","unstructured":"[27] S. Sun, <i>et al.<\/i>: \u201cThe case for hybrid photonic plasmonic interconnects (HyPPIs): Low-latency energy-and-area-efficient on-chip interconnects,\u201d IEEE Photon. J. <b>7<\/b> (2015) 4801614 (DOI: 10.1109\/JPHOT.2015.2496357).","DOI":"10.1109\/JPHOT.2015.2496357"},{"key":"27","doi-asserted-by":"publisher","unstructured":"[28] C. Tang, <i>et al.<\/i>: \u201cWaffle: A new photonic plasmonic router for optical network on chip,\u201d IEICE Trans. Inf. &amp; Syst. <b>E101.D<\/b> (2018) 2401 (DOI: 10.1587\/transinf.2018EDL8085).","DOI":"10.1587\/transinf.2018EDL8085"},{"key":"28","doi-asserted-by":"publisher","unstructured":"[29] W. Ding, <i>et al.<\/i>: \u201cCompact and low crosstalk waveguide crossing using impedance matched metamaterial,\u201d Appl. Phys. Lett. <b>96<\/b> (2010) 111114 (DOI: 10.1063\/1.3364145).","DOI":"10.1063\/1.3364145"},{"key":"29","doi-asserted-by":"publisher","unstructured":"[30] F. Xia, <i>et al.<\/i>: \u201cUltracompact optical buffers on a silicon chip,\u201d Nat. Photonics <b>1<\/b> (2007) 65 (DOI: 10.1038\/nphoton.2006.42).","DOI":"10.1038\/nphoton.2006.42"},{"key":"30","doi-asserted-by":"publisher","unstructured":"[31] L. Liang, <i>et al.<\/i>: \u201cN \u00d7 N reconfigurable nonblocking polymer\/silica hybrid planar optical switch matrix based on total-internal-reflection effect,\u201d IEEE Photon. J. <b>9<\/b> (2017) 7904611 (DOI: 10.1109\/JPHOT.2017.2718019).","DOI":"10.1109\/JPHOT.2017.2718019"},{"key":"31","doi-asserted-by":"publisher","unstructured":"[32] R. Ji, <i>et al.<\/i>: \u201cFive-port optical router for photonic networks-on-chip,\u201d Opt. Express <b>19<\/b> (2011) 20258 (DOI: 10.1364\/OE.19.020258).","DOI":"10.1364\/OE.19.020258"}],"container-title":["IEICE Electronics Express"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/16\/13\/16_16.20190346\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,7,13]],"date-time":"2019-07-13T03:23:22Z","timestamp":1562988202000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/16\/13\/16_16.20190346\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019]]},"references-count":31,"journal-issue":{"issue":"13","published-print":{"date-parts":[[2019]]}},"URL":"https:\/\/doi.org\/10.1587\/elex.16.20190346","relation":{},"ISSN":["1349-2543"],"issn-type":[{"value":"1349-2543","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019]]}}}