{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,25]],"date-time":"2026-06-25T13:09:48Z","timestamp":1782392988099,"version":"3.54.5"},"reference-count":37,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"3","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Electron. Express"],"published-print":{"date-parts":[[2020]]},"DOI":"10.1587\/elex.16.20190642","type":"journal-article","created":{"date-parts":[[2019,12,12]],"date-time":"2019-12-12T22:04:24Z","timestamp":1576188264000},"page":"20190642-20190642","source":"Crossref","is-referenced-by-count":8,"title":["A synchronous driving approach based on adaptive delay phase-locked loop for stitching CMOS image sensor"],"prefix":"10.1587","volume":"17","author":[{"given":"Zhongjie","family":"Guo","sequence":"first","affiliation":[{"name":"School of Automation and Information Engineering, Xi\u2019an University of Technology"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ningmei","family":"Yu","sequence":"additional","affiliation":[{"name":"School of Automation and Information Engineering, Xi\u2019an University of Technology"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Longsheng","family":"Wu","sequence":"additional","affiliation":[{"name":"Xi\u2019an Microelectronic Technology Institute"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"532","reference":[{"key":"1","doi-asserted-by":"publisher","unstructured":"[1] E. R. Fossum, <i>et al.<\/i>: \u201cA review of the pinned photodiode for CCD and CMOS image sensors,\u201d IEEE J. Electron Devices Soc. <b>2<\/b> (2014) 33 (DOI: 10.1109\/JEDS.2014.2306412).","DOI":"10.1109\/JEDS.2014.2306412"},{"key":"2","doi-asserted-by":"publisher","unstructured":"[2] Y. Chen, <i>et al.<\/i>: \u201cCMOS sensor arrays for high resolution die stress mapping in packaged integrated circuits,\u201d IEEE Sensors J. <b>13<\/b> (2013) 2066 (DOI: 10.1109\/JSEN.2013.2247590).","DOI":"10.1109\/JSEN.2013.2247590"},{"key":"3","unstructured":"[3] R. Funatsu, <i>et al.<\/i>: \u201c133 Mpixel 60 fps CMOS image sensor with 32-column shared high-speed column-parallel SAR ADCs,\u201d IEEE International Solid-State Circuits Conference (2015) 112 (DOI: 10.1109\/ISSCC.2015.7062951)."},{"key":"4","unstructured":"[4] T. Watabe, <i>et al.<\/i>: \u201cA 33 Mpixel 120 fps CMOS image sensor using 12 b column-parallel pipelined cyclic ADCs,\u201d IEEE International Solid-State Circuits Conference (2012) 388 (DOI: 10.1109\/ISSCC.2012.6177047)."},{"key":"5","unstructured":"[5] A. T. Clark, <i>et al.<\/i>: \u201cA 54 mm \u00d7 54 mm \u2014 1.8 Megapixel CMOS image sensor for medical imaging,\u201d Nuclear Science Symposium Conference Record (2008) 4540 (DOI: 10.1109\/NSSMIC.2008.4774299)."},{"key":"6","doi-asserted-by":"publisher","unstructured":"[6] J. Zhu, <i>et al.<\/i>: \u201cSystematic experimental study on stitching techniques of CMOS image sensors,\u201d IEICE Electron. Express <b>13<\/b> (2016) 20160441 (DOI: 10.1587\/elex.13.20160441).","DOI":"10.1587\/elex.13.20160441"},{"key":"7","unstructured":"[7] Z. Guo and N. Yu: \u201cDesign technology of high linearity DAC for large array CMOS image sensor,\u201d 2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC) (2018) (DOI: 10.1109\/EDSSC.2018.8487151)."},{"key":"8","unstructured":"[8] J. Zhou and Y. Chen: \u201cA comparative study on the yield performance of via landing and direct stitching processes for 2D pattern connection,\u201d Proc. SPIE <b>9781<\/b> (2016) 97810T (DOI: 10.1117\/12.2219336)."},{"key":"9","unstructured":"[9] Y. C. Pai, <i>et al.<\/i>: \u201cHigh-order stitching overlay analysis for advanced process control,\u201d Proc. SPIE <b>7971<\/b> (2011) 797127 (DOI: 10.1117\/12.879360)."},{"key":"10","doi-asserted-by":"publisher","unstructured":"[10] J. Xu, <i>et al.<\/i>: \u201cA method to reduce the effect on image quality caused by resistance of column bus,\u201d IEEE Trans. Very Large Scale Integr. (VLSI) Syst. <b>27<\/b> (2019) 173 (DOI: 10.1109\/TVLSI.2018.2870858).","DOI":"10.1109\/TVLSI.2018.2870858"},{"key":"11","doi-asserted-by":"publisher","unstructured":"[11] M. S. Kim, <i>et al.<\/i>: \u201cDevelopment of a 55 \u00b5m pitch 8 inch CMOS image sensor for the high resolution NDT application,\u201d J. Instrum. <b>11<\/b> (2016) P11016 (DOI: 10.1088\/1748-0221\/11\/11\/P11016).","DOI":"10.1088\/1748-0221\/11\/11\/P11016"},{"key":"12","doi-asserted-by":"crossref","unstructured":"[12] J. Bogaerts, <i>et al.<\/i>: \u201c105 \u00d7 65 mm<sup>2<\/sup> 391 Mpixel CMOS image sensor with &gt;78 dB dynamic range for airborne mapping applications,\u201d IEEE International Solid-State Circuits Conference (2016) 114.","DOI":"10.1109\/ISSCC.2016.7417933"},{"key":"13","unstructured":"[13] S. Ay and E. Fossum: \u201cA 76 \u00d7 77 mm<sup>2<\/sup>, 16.85 million pixel CMOS APS image sensor,\u201d Symposium on VLSI Circuits Digest of Technical Papers. 2006. Digest of Technical Papers (2006) (DOI: 10.1109\/VLSIC.2006.1705291)."},{"key":"14","unstructured":"[14] A. T. Clark, <i>et al.<\/i>: \u201cA 54 mm \u00d7 54 mm \u2014 1.8 Megapixel CMOS image sensor for medical imaging,\u201d Nuclear Science Symposium Conference Record (2008) 4540 (DOI: 10.1109\/NSSMIC.2008.4774299)."},{"key":"15","doi-asserted-by":"publisher","unstructured":"[15] S. E. Bohndiek, <i>et al.<\/i>: \u201cCharacterization and testing of LAS: A prototype \u2018Large Area Sensor\u2019 with performance characteristics suitable for medical imaging applications,\u201d IEEE Trans. Nucl. Sci. <b>56<\/b> (2009) 2938 (DOI: 10.1109\/TNS.2009.2029575).","DOI":"10.1109\/TNS.2009.2029575"},{"key":"16","doi-asserted-by":"publisher","unstructured":"[16] P. Liu, <i>et al.<\/i>: \u201cNovel method to optimize the column random telegraph signal performance in CMOS image sensor,\u201d IEICE Electron. Express <b>16<\/b> (2019) 20190118 (DOI: 10.1587\/elex.16.20190118).","DOI":"10.1587\/elex.16.20190118"},{"key":"17","doi-asserted-by":"publisher","unstructured":"[17] M. A. Mustafa, <i>et al.<\/i>: \u201cRTS noise reduction of CMOS image sensors using amplifier-selection pixels,\u201d IEICE Electron. Express <b>10<\/b> (2013) 20130299 (DOI: 10.1587\/elex.10.20130299).","DOI":"10.1587\/elex.10.20130299"},{"key":"18","unstructured":"[18] S. Kawahito: \u201cSignal processing architectures for low-noise high-resolution CMOS image sensors,\u201d IEEE 2007 Custom Integrated Circuits Conference (CICC) (2007) 695 (DOI: 10.1109\/CICC.2007.4405827)."},{"key":"19","doi-asserted-by":"publisher","unstructured":"[19] S.-F. Yeh, <i>et al.<\/i>: \u201cA 0.66e<sub>rms<\/sub><sup>\u2212<\/sup> temporal-readout-noise 3-D-stacked CMOS image sensor with conditional correlated multiple sampling technique,\u201d IEEE J. Solid-State Circuits <b>53<\/b> (2018) 527 (DOI: 10.1109\/JSSC.2017.2765927).","DOI":"10.1109\/JSSC.2017.2765927"},{"key":"20","doi-asserted-by":"publisher","unstructured":"[20] S.-I. Hwang, <i>et al.<\/i>: \u201cA 2.7-M pixels 64-mW CMOS image sensor with multicolumn-parallel noise-shaping SAR ADCs,\u201d IEEE Trans. Electron Devices <b>65<\/b> (2018) 1119 (DOI: 10.1109\/TED.2018.2795005).","DOI":"10.1109\/TED.2018.2795005"},{"key":"21","doi-asserted-by":"publisher","unstructured":"[21] X. Ge and A. J. P. Theuwissen: \u201cA 0.5e<sub>rms<\/sub><sup>\u2212<\/sup> temporal noise CMOS image sensor with Gm-cell-based pixel and period-controlled variable conversion gain,\u201d IEEE Trans. Electron Devices <b>64<\/b> (2017) 5019 (DOI: 10.1109\/TED.2017.2759787).","DOI":"10.1109\/TED.2017.2759787"},{"key":"22","doi-asserted-by":"publisher","unstructured":"[22] B. Hu, <i>et al.<\/i>: \u201cA capacitor-DAC-based technique for pre-emphasis-enabled multilevel transmitters,\u201d IEEE Trans. Circuits Syst. II, Exp. Briefs <b>64<\/b> (2017) 1012 (DOI: 10.1109\/TCSII.2016.2619623).","DOI":"10.1109\/TCSII.2016.2619623"},{"key":"23","unstructured":"[23] H. Totsuka, <i>et al.<\/i>: \u201cAn APS-H-size 250 Mpixel CMOS image sensor using column single-slope ADCs with dual-gain amplifiers,\u201d 2016 IEEE International Solid-State Circuits Conference (ISSCC) (2016) 116 (DOI: 10.1109\/ISSCC.2016.7417934)."},{"key":"24","doi-asserted-by":"publisher","unstructured":"[24] T. Takahashi, <i>et al.<\/i>: \u201cA stacked CMOS image sensor with array-parallel ADC architecture,\u201d IEEE J. Solid-State Circuits <b>53<\/b> (2018) 1061 (DOI: 10.1109\/JSSC.2017.2784759).","DOI":"10.1109\/JSSC.2017.2784759"},{"key":"25","unstructured":"[25] I. Takayanagi, <i>et al.<\/i>: U.S. Patent 8035718B2."},{"key":"26","doi-asserted-by":"publisher","unstructured":"[26] K. Yasutomi, <i>et al.<\/i>: \u201cA sub-100 \u00b5m-range-resolution time-of-flight range image sensor with three-tap lock-in pixels, non-overlapping gate clock, and reference plane sampling,\u201d IEEE J. Solid-State Circuits <b>54<\/b> (2019) 2291 (DOI: 10.1109\/JSSC.2019.2916310).","DOI":"10.1109\/JSSC.2019.2916310"},{"key":"27","doi-asserted-by":"publisher","unstructured":"[27] L. Miao, <i>et al.<\/i>: \u201cA column-parallel clock skew self-calibration circuit for time-resolved CMOS image sensors,\u201d IEICE Electron. Express <b>12<\/b> (2015) 20150911 (DOI: 10.1587\/elex.12.20150911).","DOI":"10.1587\/elex.12.20150911"},{"key":"28","unstructured":"[28] K. Yasutomi, <i>et al.<\/i>: \u201cA 0.3 mm-resolution Time-of-Flight CMOS range imager with column-gating clock-skew calibration,\u201d 2014 IEEE International Solid-State Circuits Conference (2014) 132 (DOI: 10.1109\/ISSCC.2014.6757369)."},{"key":"29","doi-asserted-by":"publisher","unstructured":"[29] M. El-Chammas and B. Murmann: \u201cA 12-GS\/s 81-mW 5-bit time-interleaved flash ADC with background timing skew calibration,\u201d IEEE J. Solid-State Circuits <b>46<\/b> (2011) 838 (DOI: 10.1109\/JSSC.2011.2108125).","DOI":"10.1109\/JSSC.2011.2108125"},{"key":"30","doi-asserted-by":"publisher","unstructured":"[30] S. M. Jamal, <i>et al.<\/i>: \u201cA 10-b 120-Msample\/s time-interleaved analog-to-digital converter with digital background calibration,\u201d IEEE J. Solid-State Circuits <b>37<\/b> (2002) 1618 (DOI: 10.1109\/JSSC.2002.804327).","DOI":"10.1109\/JSSC.2002.804327"},{"key":"31","doi-asserted-by":"publisher","unstructured":"[31] J. Noh and D.-W. Jee: \u201cA DLL based clock multiplier using rotational DCDL and PRNG for spur reduction,\u201d IEICE Electron. Express <b>16<\/b> (2019) 20181022 (DOI: 10.1587\/elex.16.20181022).","DOI":"10.1587\/elex.16.20181022"},{"key":"32","doi-asserted-by":"publisher","unstructured":"[32] K. Ryu, <i>et al.<\/i>: \u201cHigh-speed, low-power, and highly reliable frequency multiplier for DLL-based clock generator,\u201d IEEE Trans. Very Large Scale Integr. (VLSI) Syst. <b>24<\/b> (2016) 1484 (DOI: 10.1109\/TVLSI.2015.2453366).","DOI":"10.1109\/TVLSI.2015.2453366"},{"key":"33","unstructured":"[33] Z. Ge, <i>et al.<\/i>: \u201cImprove clock tree efficiency for low power clock tree design,\u201d 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (2016) (DOI: 10.1109\/ICSICT.2016.7999057)."},{"key":"34","unstructured":"[34] T.-J. Wang, <i>et al.<\/i>: \u201cTop-level activity-driven clock tree synthesis with clock skew variation considered,\u201d 2016 IEEE International Symposium on Circuits and Systems (ISCAS) (2016) (DOI: 10.1109\/ISCAS.2016.7539123)."},{"key":"35","doi-asserted-by":"publisher","unstructured":"[35] S. Roy, <i>et al.<\/i>: \u201cClock tree resynthesis for multi-corner multi-mode timing closure,\u201d IEEE Trans. Comput.-Aided Design Integr. Circuits Syst. <b>34<\/b> (2015) 589 (DOI: 10.1109\/TCAD.2015.2394310).","DOI":"10.1109\/TCAD.2015.2394310"},{"key":"36","doi-asserted-by":"publisher","unstructured":"[36] K. Imai, <i>et al.<\/i>: \u201cA distributed ramp signal generator of column-parallel single-slope ADCs for CMOS image sensors,\u201d IEICE Electron. Express <b>9<\/b> (2012) 1893 (DOI: 10.1587\/elex.9.1893).","DOI":"10.1587\/elex.9.1893"},{"key":"37","doi-asserted-by":"publisher","unstructured":"[37] T. Wang, <i>et al.<\/i>: \u201cA 19-bit column-parallel folding-integration\/cyclic cascaded ADC with a pre-charging technique for CMOS image sensors,\u201d IEICE Electron. Express <b>14<\/b> (2017) 20161199 (DOI: 10.1587\/elex.14.20161199).","DOI":"10.1587\/elex.14.20161199"}],"container-title":["IEICE Electronics Express"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/17\/3\/17_16.20190642\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,10,8]],"date-time":"2022-10-08T10:27:41Z","timestamp":1665224861000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/17\/3\/17_16.20190642\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020]]},"references-count":37,"journal-issue":{"issue":"3","published-print":{"date-parts":[[2020]]}},"URL":"https:\/\/doi.org\/10.1587\/elex.16.20190642","relation":{},"ISSN":["1349-2543"],"issn-type":[{"value":"1349-2543","type":"electronic"}],"subject":[],"published":{"date-parts":[[2020]]}}}