{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,1]],"date-time":"2022-04-01T19:38:40Z","timestamp":1648841920976},"reference-count":33,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"10","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Electron. Express"],"published-print":{"date-parts":[[2020,5,25]]},"DOI":"10.1587\/elex.17.20200094","type":"journal-article","created":{"date-parts":[[2020,4,9]],"date-time":"2020-04-09T22:06:15Z","timestamp":1586469975000},"page":"20200094-20200094","source":"Crossref","is-referenced-by-count":0,"title":["An improved segmented DAC for column readout circuit correction of large array CMOS image sensor"],"prefix":"10.1587","volume":"17","author":[{"given":"Zhongjie","family":"Guo","sequence":"first","affiliation":[{"name":"School of Automation and Information Engineering, Xi\u2019an University of Technology"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ningmei","family":"Yu","sequence":"additional","affiliation":[{"name":"School of Automation and Information Engineering, Xi\u2019an University of Technology"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Longsheng","family":"Wu","sequence":"additional","affiliation":[{"name":"Xi\u2019an Microelectronic Technology Institute"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"532","reference":[{"key":"1","unstructured":"[1] K.D. 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Briefs <b>65<\/b> (2017) 824 (DOI: 10.1109\/tcsii.2017.2717044)."}],"container-title":["IEICE Electronics Express"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/17\/10\/17_17.20200094\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,5,30]],"date-time":"2020-05-30T03:35:14Z","timestamp":1590809714000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/17\/10\/17_17.20200094\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,5,25]]},"references-count":33,"journal-issue":{"issue":"10","published-print":{"date-parts":[[2020]]}},"URL":"https:\/\/doi.org\/10.1587\/elex.17.20200094","relation":{},"ISSN":["1349-2543"],"issn-type":[{"value":"1349-2543","type":"electronic"}],"subject":[],"published":{"date-parts":[[2020,5,25]]}}}