{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T12:13:20Z","timestamp":1740140000934,"version":"3.37.3"},"reference-count":31,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"10","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Electron. Express"],"published-print":{"date-parts":[[2020,5,25]]},"DOI":"10.1587\/elex.17.20200102","type":"journal-article","created":{"date-parts":[[2020,4,9]],"date-time":"2020-04-09T22:06:17Z","timestamp":1586469977000},"page":"20200102-20200102","source":"Crossref","is-referenced-by-count":2,"title":["Study on the single-event upset sensitivity of 65-nm CMOS sequential logic circuit"],"prefix":"10.1587","volume":"17","author":[{"given":"Sai","family":"LI","sequence":"first","affiliation":[{"name":"National Space Science Center, Chinese Academy of Sciences"},{"name":"University of Chinese Academy of Sciences"}]},{"given":"Jianwei","family":"HAN","sequence":"additional","affiliation":[{"name":"National Space Science Center, Chinese Academy of Sciences"}]},{"given":"Rui","family":"CHEN","sequence":"additional","affiliation":[{"name":"National Space Science Center, Chinese Academy of Sciences"}]},{"given":"Shipeng","family":"SHANGGUAN","sequence":"additional","affiliation":[{"name":"National Space Science Center, Chinese Academy of Sciences"},{"name":"University of Chinese Academy of Sciences"}]},{"given":"Yingqi","family":"MA","sequence":"additional","affiliation":[{"name":"National Space Science Center, Chinese Academy of Sciences"}]},{"given":"Xuan","family":"WANG","sequence":"additional","affiliation":[{"name":"National Space Science Center, Chinese Academy of Sciences"},{"name":"University of Chinese Academy of Sciences"}]}],"member":"532","reference":[{"key":"1","unstructured":"[1] R. Ecoffet: \u201cOverview of in-orbit radiation induced spacecraft anomalies,\u201d IEEE Trans. Nucl. Sci. <b>60<\/b> (2013) 1791 (DOI: 10.1109\/TNS.2013.2262002)."},{"key":"2","unstructured":"[2] R. Koga, <i>et al.<\/i>: \u201cObservation of single event upsets in analog microcircuits,\u201d IEEE Trans. Nucl. Sci. <b>40<\/b> (1993) 1838 (DOI: 10.1109\/23.273472)."},{"key":"3","unstructured":"[3] M.V. O\u2019Bryan, <i>et al.<\/i>: \u201cSingle event effects results for candidate,\u201d IEEE Radiation Effects Data Workshop Papers (2003) 1 (DOI: 10.1109\/REDW.2003.1281346)."},{"key":"4","unstructured":"[4] I. Villalta, <i>et al.<\/i>: \u201cEstimating the SEU failure rate of designs implemented in FPGAs in presence of MCUs,\u201d Microelectron. Reliab. <b>78<\/b> (2017) 85 (DOI: 10.1016\/j.microrel.2017.08.003)."},{"key":"5","unstructured":"[5] S.V. Walstra and C. Dai: \u201cCircuit-level modeling of soft errors in integrated circuits,\u201d IEEE Trans. Device Mater. Rel. <b>5<\/b> (2005) 358 (DOI: 10.1109\/TDMR.2005.855684)."},{"key":"6","unstructured":"[6] P.E. Dodd and L.W. Massengill: \u201cBasic mechanisms and modeling of single-event upset in digital microelectronics,\u201d IEEE Trans. Nucl. Sci. <b>50<\/b> (2003) 583 (DOI: 10.1109\/TNS.2003.813129)."},{"key":"7","unstructured":"[7] S. Jagannathan, <i>et al.<\/i>: \u201cFrequency dependence of alpha-particle induced soft error rates of flip-flops in 40-nm CMOS technology,\u201d IEEE Trans. Nucl. Sci. <b>59<\/b> (2012) 2796 (DOI: 10.1109\/TNS.2012.2223827)."},{"key":"8","unstructured":"[8] R.C. Baumann: \u201cLandmarks in terrestrial single-event effects,\u201d Proc. 2013 NSREC Short Course Papers (2013)."},{"key":"9","unstructured":"[9] H.T. Nguyen, <i>et al.<\/i>: \u201cChip-level soft error estimation method,\u201d IEEE Trans. Device Mater. Rel. <b>5<\/b> (2005) 365 (DOI: 10.1109\/TDMR. 2005.858334)."},{"key":"10","unstructured":"[10] C.-H. Chen, <i>et al.<\/i>: \u201cCharacterization of heavy-ion-induced single-event effects in 65 nm bulk CMOS ASIC test chips,\u201d IEEE Trans. Nucl. Sci. <b>61<\/b> (2014) 2694 (DOI: 10.1109\/TNS.2014.2342872)."},{"key":"11","unstructured":"[11] R.M. Chen, <i>et al<\/i>.: \u201cImpact of temporal masking of flip-flop upsets on soft error rates of sequential circuits,\u201d IEEE Trans. Nucl. Sci. <b>64<\/b> (2017) 2098 (DOI: 10.1109\/TNS.2017.2711034)."},{"key":"12","unstructured":"[12] N.N. Mahatme, <i>et al.<\/i>: \u201cComparison of combinational and sequential error rates for a deep submicron process,\u201d IEEE Trans. Nucl. Sci. <b>58<\/b> (2011) 2719 (DOI: 10.1109\/TNS.2011.2171993)."},{"key":"13","unstructured":"[13] X. Hui and Z. Yun: \u201cCircuit and layout combination technique to enhance multiple nodes upset tolerance in latches,\u201d IEICE Electron. Express <b>12<\/b> (2015) 1 (DOI: 10.1587\/elex.12.20150286)."},{"key":"14","unstructured":"[14] S.P. Buchner <i>et al.<\/i>: \u201cPulsed-laser testing for single-event effects investigations,\u201d IEEE Trans. Nucl. Sci. <b>60<\/b> (2013) 1852 (DOI: 10.1109\/TNS.2013.2255312)."},{"key":"15","unstructured":"[15] A. Ildefonso, <i>et al.<\/i>: \u201cComparison of single-event transients in SiGe HBTs on bulk and thick-film SOI sub-bandgap,\u201d IEEE Trans. Nucl. Sci. <b>67<\/b> (2020) 71 (DOI: 10.1109\/TNS.2019.2950864)."},{"key":"16","unstructured":"[16] H. Wang, <i>et al.<\/i>: \u201cA single event upset hardened flip-flop design utilizing layout technique,\u201d Microelectron. Reliab. <b>102<\/b> (2019) 113496 (DOI: 10.1016\/j.microrel.2019.113496)."},{"key":"17","unstructured":"[17] A.K. Richter and I. Arimura: \u201cSimulation of heavy charged particle tracks using focused laser beams,\u201d IEEE Trans. Nucl. Sci. <b>34<\/b> (1987) 1234 (DOI: 10.1109\/TNS.1987.4337458)."},{"key":"18","unstructured":"[18] O. Musseau, <i>et al.<\/i>: \u201cLaser probing of bipolar amplification in 0.25-\u03bcm MOS\/SOI transistors,\u201d Trans. Nucl. Sci. <b>37<\/b> (2000) 2196 (DOI: 10.1109\/23.903753)."},{"key":"19","unstructured":"[19] National University of Defense Technology: China Patent 2010102956204 (2010)."},{"key":"20","unstructured":"[20] \u201cTransient radiation screening of silicon devices using laser irradiation,\u201d IEEE Trans. Nucl. Sci. NS-29 (1982) 1809 (DOI: 10.1109\/TNS.1982.4336452)."},{"key":"21","unstructured":"[21] F. Darracq, <i>et al.<\/i>: \u201cBackside SEU laser testing for commercial off-the-shelf SRAMs,\u201d IEEE Trans. Nucl. Sci. <b>49<\/b> (2002) 2977 (DOI: 10.1109\/TNS.2002.805393)."},{"key":"22","unstructured":"[22] C. Rui, <i>et al.<\/i>: \u201cComparative research on \u201chigh currents\u201d induced by single event latch-up and transient-induced latch-up,\u201d Chin. Phys. B. <b>24<\/b> (2015) 046103-1 (DOI: 10.1088\/1674-1056\/24\/4\/046103)."},{"key":"23","unstructured":"[23] P.E. Dodd, <i>et al.<\/i>: \u201cImpact of technology trends on SEU in CMOS SRAMs,\u201d IEEE Trans. Nucl. Sci. <b>43<\/b> (1996) 2797 (DOI: 10.1109\/23.556869)."},{"key":"24","unstructured":"[24] H.T. Weaver: \u201cSoft error stability of p-well versus n-well CMOS latches derived from 2D, transient simulations,\u201d IEDM Tech. Dig. Papers (1988) 512 (DOI: http:\/\/dx.doi.org\/10.1109\/iedm.1988.32867<i><\/i>)."},{"key":"25","unstructured":"[25] T. Kamik, <i>et al.<\/i>: \u201cScaling trends of cosmic ray induced soft errors in static latches beyond 0.18\u03bcm,\u201d Symposium on VLSI Circuits Digest of Technical Papers (2001) 61 (DOI: 10.1109\/VLSIC.2001.934195)."},{"key":"26","unstructured":"[26] J. Barak, <i>et al.<\/i>: \u201cScaling of SEU mapping and cross section, and proton induced SEU at reduced supply voltage,\u201d IEEE Trans. Nucl. Sci. <b>46<\/b> (1999) 1342 (DOI: 10.1109\/23.819092)."},{"key":"27","unstructured":"[27] R. Chen: \u201cStudy of single-event-effects of logic circuits in nanometer bulk CMOS process,\u201d Ph.D. Dissertation, Tsinghua University, Beijing (2017)."},{"key":"28","doi-asserted-by":"crossref","unstructured":"[28] N. Seifert and N. Tam: \u201cTiming vulnerability factors of sequentials,\u201d IEEE Trans. Device Mater. Rel. <b>4<\/b> (2004) 516 (DOI: 10.1109\/ TDMR.2004.831993).","DOI":"10.1109\/TDMR.2004.831993"},{"key":"29","unstructured":"[29] O. Musseau, <i>et al.<\/i>: \u201cSEU in SOI SRAM --a static model--,\u201d IEEE Trans. Nucl. Sci. <b>41<\/b> (1994) 607 (DOI: 10.1109\/23.299807)."},{"key":"30","unstructured":"[30] G.C. Messenger: \u201cCollection of charge on junction nodes from ion tracks,\u201d IEEE Trans. Nucl. Sci. <b>29<\/b> (1982) 2024 (DOI: 10.1109\/TNS.1982.4336490)."},{"key":"31","unstructured":"[31] H. Cha and J.H. Patel: \u201cA logic-level model for particle hits in CMOS circuits,\u201d Proc. 12th Int. Conf. ICCD Papers (1993) 538 (DOI: 10.1109\/ICCD.1993.393319)."}],"container-title":["IEICE Electronics Express"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/17\/10\/17_17.20200102\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,5,30]],"date-time":"2020-05-30T03:37:37Z","timestamp":1590809857000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/17\/10\/17_17.20200102\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,5,25]]},"references-count":31,"journal-issue":{"issue":"10","published-print":{"date-parts":[[2020]]}},"URL":"https:\/\/doi.org\/10.1587\/elex.17.20200102","relation":{},"ISSN":["1349-2543"],"issn-type":[{"type":"electronic","value":"1349-2543"}],"subject":[],"published":{"date-parts":[[2020,5,25]]}}}