{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,28]],"date-time":"2026-02-28T14:32:39Z","timestamp":1772289159594,"version":"3.50.1"},"reference-count":31,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"17","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Electron. Express"],"published-print":{"date-parts":[[2020,9,10]]},"DOI":"10.1587\/elex.17.20200243","type":"journal-article","created":{"date-parts":[[2020,8,24]],"date-time":"2020-08-24T22:05:15Z","timestamp":1598306715000},"page":"20200243-20200243","source":"Crossref","is-referenced-by-count":10,"title":["A fast and low-power level shifter for multi-supply voltage designs"],"prefix":"10.1587","volume":"17","author":[{"given":"Jialu","family":"Yin","sequence":"first","affiliation":[{"name":"Institute of Microelectronics of Chinese Academy of Sciences"},{"name":"University of Chinese Academy of Sciences"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jia","family":"Yuan","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics of Chinese Academy of Sciences"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Heng","family":"You","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics of Chinese Academy of Sciences"},{"name":"University of Chinese Academy of Sciences"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Peng","family":"Wang","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics of Chinese Academy of Sciences"},{"name":"University of Chinese Academy of Sciences"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shushan","family":"Qiao","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics of Chinese Academy of Sciences"},{"name":"University of Chinese Academy of Sciences"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"532","reference":[{"key":"1","unstructured":"[1] J. Myers, <i>et al.<\/i>: \u201cA subthreshold ARM cortex-M0+ subsystem in 65 nm CMOS for WSN applications with 14 power domains 10T SRAM and integrated voltage regulator,\u201d IEEE J. Solid-State Circuits <b>51<\/b> (2016) 31 (DOI: 10.1109\/JSSC.2015.2477046)."},{"key":"2","unstructured":"[2] M. Fojtik, <i>et al.<\/i>: \u201cA millimeter-scale energy-autonomous sensor system with stacked battery and solar cells,\u201d IEEE J. Solid-State Circuits <b>48<\/b> (2013) 801 (DOI: 10.1109\/JSSC.2012.2233352)."},{"key":"3","unstructured":"[3] G. Lallement, <i>et al.<\/i>: \u201cA 2.7 pJ\/cycle 16 MHz, 0.7 \u00b5W deep sleep power ARM cortex-M0+ core SoC in 28 nm FD-SOI,\u201d IEEE J. Solid-State Circuits <b>53<\/b> (2018) 2088 (DOI: 10.1109\/JSSC.2018.2821167)."},{"key":"4","doi-asserted-by":"publisher","unstructured":"[4] J. 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(VLSI) Syst. <b>15<\/b> (2007) 637 (DOI: 10.1109\/TVLSI.2007.898650)."},{"key":"11","unstructured":"[11] S.R. Hosseini, <i>et al.<\/i>: \u201cA high-speed and power-efficient voltage level shifter for dual-supply applications,\u201d IEEE Trans. Very Large Scale Integr. (VLSI) Syst. <b>25<\/b> (2017) 1154 (DOI: 10.1109\/TVLSI.2016.2604377)."},{"key":"12","unstructured":"[12] S. L\u00fctkemeier and U. Ruckert: \u201cA subthreshold to above-threshold level shifter comprising a Wilson current mirror,\u201d IEEE Trans. Circuits Syst. II, Exp. Briefs <b>57<\/b> (2010) 721 (DOI: 10.1109\/TCSII.2010.2056110)."},{"key":"13","unstructured":"[13] V.L. Le and T.T.-H. Kim: \u201cAn area and energy efficient ultra-low voltage level shifter with pass transistor and reduced-swing output buffer in 65-nm CMOS,\u201d IEEE Trans. Circuits Syst. II, Exp. Briefs <b>65<\/b> (2018) 607 (DOI: 10.1109\/TCSII.2018.2820155)."},{"key":"14","unstructured":"[14] L. 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Hosseini, <i>et al.<\/i>: \u201cA high-speed and power-efficient voltage level shifter for dual-supply applications,\u201d IEEE Trans. Very Large Scale Integr. (VLSI) Syst. <b>25<\/b> (2017) 1154 (DOI: 10.1109\/TVLSI.2016.2604377)","DOI":"10.1109\/TVLSI.2016.2604377"},{"key":"18","unstructured":"[18] S.R. Hosseini, <i>et al.<\/i>: \u201cA low-power subthreshold to above-threshold voltage level shifter,\u201d IEEE Trans. Circuits Syst. II, Exp. Briefs <b>61<\/b> (2014) 753 (DOI: 10.1109\/TCSII.2014.2345295)."},{"key":"19","doi-asserted-by":"publisher","unstructured":"[19] S.-C. Luo, <i>et al.<\/i>: \u201cA wide-range level shifter using a modified Wilson current mirror hybrid buffer,\u201d IEEE Trans. Circuits Syst. I, Reg. Papers <b>61<\/b> (2014) 1656 (DOI: 10.1109\/TCSI.2013.2295015)","DOI":"10.1109\/TCSI.2013.2295015"},{"key":"20","unstructured":"[20] Y. Osaki, <i>et al.<\/i>: \u201cA wide input voltage range level shifter circuit for extremely low-voltage digital LSIs,\u201d IEICE Electron. Express <b>8<\/b> (2011) 890 (DOI: 10.1587\/elex.8.890)."},{"key":"21","doi-asserted-by":"publisher","unstructured":"[21] N. Maroof, <i>et al.<\/i>: \u201cEnergy efficient low static-power voltage level shifter,\u201d IEICE Electron. Express <b>12<\/b> (2015) 20150633 (DOI: 10.1587\/elex.12.20150633)","DOI":"10.1587\/elex.12.20150633"},{"key":"22","doi-asserted-by":"publisher","unstructured":"[22] J. Zhou, <i>et al.<\/i>: \u201cAn ultra-low voltage level shifter using revised Wilson current mirror for fast and energy-efficient wide-range voltage conversion from sub-threshold to I\/O voltage,\u201d IEEE Trans. Circuits Syst. I, Reg. Papers <b>62<\/b> (2015) 697 (DOI: 10.1109\/TCSI.2014.2380691)","DOI":"10.1109\/TCSI.2014.2380691"},{"key":"23","unstructured":"[23] E. Maghsoudloo, <i>et al.<\/i>: \u201cA high-speed and ultra low-power subthreshold signal level shifter,\u201d IEEE Trans. Circuits Syst. I, Reg. Papers <b>64<\/b> (2017) 1164 (DOI: 10.1109\/TCSI.2016.2633430)."},{"key":"24","unstructured":"[24] M. Lanuzza, <i>et al.<\/i>: \u201cFast and wide range voltage conversion in multisupply voltage designs,\u201d IEEE Trans. Very Large Scale Integr. (VLSI) Syst. <b>23<\/b> (2015) 388 (DOI: 10.1109\/TVLSI.2014.2308400)."},{"key":"25","unstructured":"[25] S. Kabirpour and M. Jalali: \u201cA low-power and high-speed voltage level shifter based on a regulated cross-coupled pull-up network,\u201d IEEE Trans. Circuits Syst. II, Exp. Briefs <b>66<\/b> (2019) 909 (DOI: 10.1109\/TCSII.2018.2872814)."},{"key":"26","unstructured":"[26] M. Lanuzza, <i>et al.<\/i>: \u201cAn ultra-low voltage energy-efficient level shifter,\u201d IEEE Trans. Circuits Syst. II, Exp. Briefs <b>64<\/b> (2017) 61 (DOI: 10.1109\/TCSII.2016.2538724)."},{"key":"27","unstructured":"[27] W. Zhao, <i>et al.<\/i>: \u201cA 65-nm 25.1-ns 30.7-fJ robust subthreshold level shifter with wide conversion range,\u201d IEEE Trans. Circuits Syst. II, Exp. Briefs <b>62<\/b> (2015) 671 (DOI: 10.1109\/TCSII.2015.2406354)."},{"key":"28","unstructured":"[28] H. You, <i>et al.<\/i>: \u201cAn ultra-low leakage energy efficient level shifter with wide conversion range,\u201d IEICE Electron. Express <b>16<\/b> (2019) 20190507 (DOI: 10.1587\/elex.16.20190507)."},{"key":"29","unstructured":"[29] Y. Cao, <i>et al.<\/i>: \u201cA compact 31.47 fJ\/conversion subthreshold level shifter with wide conversion range in 65 nm MTCMOS,\u201d IEEE Access <b>6<\/b> (2018) 54976 (DOI: 10.1109\/ACCESS.2018.2871187)."},{"key":"30","unstructured":"[30] M. Lanuzza, <i>et al.<\/i>: \u201cLow-power level shifter for multi-supply voltage designs,\u201d IEEE Trans. Circuits Syst. II, Exp. Briefs <b>59<\/b> (2012) 922 (DOI: 10.1109\/TCSII.2012.2231037)."},{"key":"31","unstructured":"[31] Y. Ho, <i>et al.<\/i>: \u201cA variation-tolerant subthreshold to superthreshold level shifter for heterogeneous interfaces,\u201d IEEE Trans. Circuits Syst. II, Exp. Briefs <b>63<\/b> (2016) 161 (DOI: 10.1109\/TCSII.2015.2415714)."}],"container-title":["IEICE Electronics Express"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/17\/17\/17_17.20200243\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,9,12]],"date-time":"2020-09-12T03:30:11Z","timestamp":1599881411000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/17\/17\/17_17.20200243\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,9,10]]},"references-count":31,"journal-issue":{"issue":"17","published-print":{"date-parts":[[2020]]}},"URL":"https:\/\/doi.org\/10.1587\/elex.17.20200243","relation":{},"ISSN":["1349-2543"],"issn-type":[{"value":"1349-2543","type":"electronic"}],"subject":[],"published":{"date-parts":[[2020,9,10]]}}}