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Proesel, <i>et al.<\/i>: \u201c25Gb\/s 3.6pJ\/b and 15Gb\/s 1.37pJ\/b VCSEL-based optical links in 90nm CMOS,\u201d ISSCC Dig. Tech. Papers (2012) 418 (DOI: 10.1109\/ISSCC.2012.6177072)."},{"key":"2","unstructured":"[2] T.-C. Huang, <i>et al.<\/i>: \u201c8.4 A 28Gb\/s 1pJ\/b shared-inductor optical receiver with 56% chip-area reduction in 28nm CMOS,\u201d ISSCC Dig. Tech. Papers (2014) 144 (DOI: 10.1109\/ISSCC.2014.6757374)."},{"key":"3","unstructured":"[3] Q. Pan, <i>et al.<\/i>: \u201cA 30-Gb\/s 1.37-pJ\/b CMOS receiver for optical interconnects,\u201d J. Lightw. Technol. <b>33<\/b> (2015) 778 (DOI: 10.1109\/JLT.2014.2381266)."},{"key":"4","unstructured":"[4] H. Korramabadi, <i>et al.<\/i>: \u201cA 1.06 Gb\/s -31 dBm to 0 dBm BiCMOS optical preamplifier featuring adaptive transimpedance,\u201d ISSCC Dig. Tech. Papers (1996) 143 (DOI: 10.1109\/ISSCC.1995.535273)."},{"key":"5","unstructured":"[5] S. Ray and M.M. Hella: \u201cA 30-75dB<i>\u03a9<\/i> 2.5 GHz 0.13-\u00b5m CMOS receiver front-end with large input capacitance tolerance for short-range optical communication,\u201d IEEE Trans. Circuits Syst. I, Reg. Papers <b>63<\/b> (2016) 1404 (DOI: 10.1109\/TCSI.2016.2580709)."},{"key":"6","unstructured":"[6] A. Awny, <i>et al.<\/i>: \u201cA liner differential transimpedance amplifier for 100-Gb\/s integrated coherent optical fiber receivers,\u201d IEEE Trans. Microw. Theory Techn. <b>66<\/b> (2018) 973 (DOI: 10.1109\/TMTT.2017.2752170)."},{"key":"7","unstructured":"[7] X. Yin, <i>et al.<\/i>: \u201cA 10 Gb\/s burst-mode TIA with on-chip reset\/lock CM signaling detection and limiting Amplifier with a 75ns settling time,\u201d ISSCC Dig. Tech. Papers (2012) 416 (DOI: 10.1109\/ISSCC.2012.6177071)."},{"key":"8","unstructured":"[8] Q. Le, <i>et al.<\/i>: \u201cA CMOS burst-mode TIA with step AGC and selective internally created reset for 1.25Gb\/s EPON,\u201d ISSCC Dig. Tech. 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Solid-State Circuits <b>51<\/b> (2016) 440 (DOI: 10.1109\/JSSC.2015.2496782)."},{"key":"13","unstructured":"[13] C.-F. Liao and S.-I. Liu: \u201c10 Gb\/s CMOS AGC amplifier with 35 dB dynamic range for 10 Gb Ethernet,\u201d ISSCC Dig. Tech. Papers (2006) 2092 (DOI: 10.1109\/ISSCC.2006.1696269)."},{"key":"14","unstructured":"[14] R. Reimann and H.-M. Rein: \u201cA single-chip bipolar AGC amplifier with large dynamic range for optical-fiber receivers operating up to 3 Gbit\/s,\u201d IEEE J. Solid-State Circuits <b>24<\/b> (1989) 1744 (DOI: 10.1109\/4.45015)."},{"key":"15","unstructured":"[15] J. Pablo, <i>et al.<\/i>: <i>Automatic Gain Control: Techniques and Architectures for RF Receivers<\/i> (Springer, 2011) 14."},{"key":"16","unstructured":"[16] S. Mohan, <i>et al.<\/i>: \u201cBandwidth extension in CMOS with optimized on-chip inductors,\u201d IEEE J. Solid-State Circuits <b>35<\/b> (2000) 346 (DOI: 10.1109\/4.826816)."},{"key":"17","unstructured":"[17] S. Galal and B. Razavi: \u201c40-Gb\/s amplifier and ESD protection circuit in 0.18-\u00b5m CMOS Technology,\u201d IEEE J. Solid-State Circuits <b>39<\/b> (2004) 2389 (DOI: 10.1109\/JSSC.2004.835639)."},{"key":"18","unstructured":"[18] Z. Lu, <i>et al.<\/i>: \u201cDesign of a CMOS broadband transimpedance amplifier with active feedback,\u201d IEEE Trans. Very Large Scale Integr. (VLSI) Syst. <b>18<\/b> (2010) 461 (DOI: 10.1109\/TVLSI.2008.2012262)."},{"key":"19","unstructured":"[19] C. Li and S. Palermo: \u201cA low-power 26-GHz transformer-based regulated cascode SiGe BiCMOS transimpedance amplifier,\u201d IEEE J. Solid-State Circuits <b>48<\/b> (2013) 1264 (DOI: 10.1109\/JSSC.2013.2245059)."},{"key":"20","unstructured":"[20] T.-C. Huang, <i>et al.<\/i>: \u201cA 28 Gb\/s 1pJ\/b shared-inductor optical receiver with 56% chip-area reduction in 28 nm CMOS,\u201d ISSCC Dig. Tech. Papers (2014) 144 (DOI: 10.1109\/ISSCC.2014.6757374)."},{"key":"21","unstructured":"[21] Y.-H. Kim, <i>et al.<\/i>: \u201cBandwidth enhancement technique for CMOS RGC transimpedance amplifier,\u201d Electron. Lett. <b>50<\/b> (2014) 882 (DOI: 10.1049\/el.2014.0612)."},{"key":"22","unstructured":"[22] G. Kalogerakis, <i>et al.<\/i>: \u201cA quad 25Gb\/s 270mW TIA in 0.13\u00b5 m BiCMOS with &lt; 0.15dB crosstalk penalty,\u201d ISSCC Dig. Tech. Papers (2013) 116 (DOI: 10.1109\/ISSCC.2013.6487661)."},{"key":"23","unstructured":"[23] C. Li and S. Palermo: \u201cA low-power 26-GHz transformer-based regulated cascode SiGe BiCMOS transimpedance amplifier,\u201d IEEE J. Solid-State Circuits <b>48<\/b> (2013) 1264 (DOI: 10.1109\/JSSC.2013.2245059)."},{"key":"24","unstructured":"[24] S.-H. Huang and W.-Z. Chen: \u201cA 25 Gb\/s 1.13 pJ\/b -10<i>.<\/i>8 dBm input sensitivity optical receiver in 40 nm CMOS,\u201d IEEE J. Solid-State Circuits <b>52<\/b> (2015) 747 (DOI: 10.1109\/JSSC.2016.2639534)."},{"key":"25","unstructured":"[25] T. Takemoto, <i>et al.<\/i>: \u201cA 25-to-28 Gb\/s high-sensitivity (-9<i>.<\/i>7 dBm) 65 nm CMOS optical receiver for board-to-board interconnects,\u201d IEEE J. Solid-State Circuits <b>49<\/b> (2014) 2259 (DOI: 10.1109\/JSSC.2014.2349976)."},{"key":"26","unstructured":"[26] A. Hida, <i>et al.<\/i>: \u201cA wideband current-reuse-RGC TIA circuit with low-power consumption,\u201d IEICE Electron. Express <b>16<\/b> (2019) 20190615 (DOI: 10.1587\/elex.16.20190615)."},{"key":"27","unstructured":"[27] C. Chen and Z. Cai: \u201cA 2.4 GHz 2.2 mW current reusing passive mixer with gm-boosted common-gate TIA in 180 nm CMOS,\u201d IEICE Electron. Express <b>16<\/b> (2019) 20181032 (DOI: 10.1587\/elex.16.20181032)."},{"key":"28","unstructured":"[28] B. Shammugasamy, <i>et al.<\/i>: \u201cA 24mW, 5Gb\/s fully balanced differential output trans-impedance amplifier with active inductor and capacitive degeneration techniques in 0.18\u00b5 m CMOS technology,\u201d IEICE Electron. Express <b>7<\/b> (2010) 308 (DOI: 10.1587\/elex.7.308)."},{"key":"29","unstructured":"[29] Q. Song, <i>et al.<\/i>: \u201cWideband SiGe BiCMOS transimpedance amplifier for 20 Gb\/s optical links,\u201d IEICE Electron. Express <b>12<\/b> (2015) 20150419 (DOI: 10.1587\/elex.12.v20150419)."},{"key":"30","unstructured":"[30] S. Xie, <i>et al.<\/i>: \u201cA design methodology to extend bandwidth for regulated cascode transimpedance amplifier,\u201d IEICE Electron. Express <b>14<\/b> (2017) 20161098 (DOI: 10.1587\/elex.13.20161098)."},{"key":"31","unstructured":"[31] B. Razavi: <i>Design of Integrated Circuits for Optical Communications<\/i> (McGraw-Hill, Chicago, 2002) 2nd ed. 95."},{"key":"32","unstructured":"[32] H.H. Kim, <i>et al.<\/i>: \u201cA Si BiCMOS transimpedance amplifier for 10Gb\/s SONET receiver,\u201d IEEE J. Solid-State Circuits <b>36<\/b> (2001) 769 (DOI: 10.1109\/4.918914)."},{"key":"33","unstructured":"[33] J. Kim and J.F. Buckwalter: \u201cBandwidth enhancement with low group-delay variation for a 40-Gb\/s transimpedance amplifier,\u201d IEEE Trans. Circuits Syst. I, Reg. Papers <b>57<\/b> (2010) 1964 (DOI: 10.1109\/TCSI.2010.2041502)."},{"key":"34","doi-asserted-by":"crossref","unstructured":"[34] E. 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