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Mostafa, <i>et al.<\/i>: \u201cPhysical unclonable function and hashing are all you need to mutually authenticate IoT devices,\u201d Sensors <b>20<\/b> (2020) 4361 (DOI: 10.3390\/s20164361)."},{"key":"2","unstructured":"[2] P. Gope, <i>et al.<\/i>: \u201cLightweight and physically secure anonymous mutual authentication protocol for real-time data access in industrial wireless sensor networks,\u201d IEEE Trans. Ind. Informat. <b>15<\/b> (2019) 4957 (DOI: 10.1109\/TII.2019.2895030)."},{"key":"3","unstructured":"[3] J. Guajardo, <i>et al.<\/i>: \u201cFPGA intrinsic PUFs and their use for IP protection,\u201d CHES 2007 <b>4727<\/b> (2007) 63 (DOI: 10.1007\/978-3-540-74735-2_5)."},{"key":"4","unstructured":"[4] X.T. Ngo, <i>et al.<\/i>: \u201cCryptographically secure shield for security IPs protection,\u201d IEEE Trans. Comput. <b>66<\/b> (2017) 354 (DOI: 10.1109\/TC.2016.2584041)."},{"key":"5","unstructured":"[5] S.K. Cherupally, <i>et al.<\/i>: \u201cA smart hardware security engine combining entropy sources of ECG, HRV, and SRAM PUF for authentication and secret key generation,\u201d IEEE J. Solid-State Circuits <b>55<\/b> (2020) 2680 (DOI: 10.1109\/JSSC.2020.3010705)."},{"key":"6","unstructured":"[6] Z. He, <i>et al.<\/i>: \u201cReliable and efficient PUF-based cryptographic key generator using bit self-tests,\u201d Electronics Letters <b>56<\/b> (2020) 803 (DOI: 10.1049\/el.2020.0344)."},{"key":"7","unstructured":"[7] S. Buchoveck\u00e1, <i>et al.<\/i>: \u201cLightweight authentication and secure communication suitable for IoT devices,\u201d ICISSP (2020) 75 (DOI: 10.5220\/0008959600750083)."},{"key":"8","unstructured":"[8] R. Pappu, <i>et al.<\/i>: \u201cPhysical one-way functions,\u201d Science <b>297<\/b> (2002) 2026 (DOI: 10.1126\/science.1074376)."},{"key":"9","unstructured":"[9] J.W. Lee, <i>et al.<\/i>: \u201cA technique to build a secret key in integrated circuits for identification and authentication applications,\u201d 2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525) (2004) 176 (DOI: 10.1109\/VLSIC.2004.1346548)."},{"key":"10","unstructured":"[10] G.E. Suh and S. Devadas: \u201cPhysical unclonable functions for device authentication and secret key generation,\u201d 44th ACM\/IEEE Design Automation Conference (2007) 9 (DOI: 10.1109\/DAC.2007.375043)."},{"key":"11","unstructured":"[11] A. Maiti and P. Schaumont: \u201cImproving the quality of a physical unclonable function using configurable ring oscillators,\u201d 19th International Conference on Field Programmable Logic and Applications (2009) 703 (DOI: 10.1109\/FPL.2009.5272361)."},{"key":"12","unstructured":"[12] A. Maiti and P. Schaumont: \u201cImproved ring oscillator PUF: an FPGA-friendly secure primitive,\u201d J. Cryptology <b>24<\/b> (2011) 375 (DOI: 10.1007\/s00145-010-9088-4)."},{"key":"13","unstructured":"[13] D. Suzuki and K. Shimizu: \u201cThe glitch PUF: a new delay-PUF architecture exploiting glitch shapes,\u201d CHES 2010 <b>6225<\/b> (2019) 366 (DOI: 10.1007\/978-3-642-15031-9_25)."},{"key":"14","unstructured":"[14] S.S. Kumar, <i>et al.<\/i>: \u201cExtended abstract: the butterfly PUF protecting IP on every FPGA,\u201d 2008 IEEE International Workshop on Hardware-Oriented Security and Trust (2008) 67 (DOI: 10.1109\/HST.2008.4559053)."},{"key":"15","unstructured":"[15] Y. Su, <i>et al.<\/i>: \u201cA 1.6pJ\/bit 96% stable chip-ID generating circuit using process variations,\u201d ISSCC 2007 (2007) 406 (DOI: 10.1109\/ISSCC.2007.373466)."},{"key":"16","unstructured":"[16] R. Maes, <i>et al.<\/i>: \u201cIntrinsic PUFs from flip-flops on reconfigurable devices,\u201d WISSec 2008 <b>17<\/b> (2008) 2008."},{"key":"17","unstructured":"[17] N. Tianming, <i>et al.<\/i>: \u201cResearch on physical unclonable functions circuit based on three dimensional integrated circuit,\u201d IEICE Electron. Express <b>15<\/b> (2018) 20180782 (DOI: 10.1587\/elex.15.20180782)."},{"key":"18","unstructured":"[18] A.S. Chauhan, <i>et al.<\/i>: \u201cNovel randomized placement for FPGA based robust RO PUF with improved uniqueness,\u201d Journal of Electronic Testing-Theory and Applications <b>35<\/b> (2019) 581 (DOI: 10.1007\/s10836-019-05829-5)."},{"key":"19","unstructured":"[19] E. Avaro\u011flu: \u201cThe implementation of ring oscillator based PUF designs in field programmable gate arrays using of different challenge,\u201d Physica A: Statistical Mechanics and its Applications <b>546<\/b> (2020) (DOI: 10.1016\/j.physa.2020.124291)."},{"key":"20","unstructured":"[20] F. Amsaad, <i>et al.<\/i>: \u201cA novel security technique to generate truly random and highly reliable reconfigurable ROPUF-based cryptographic keys,\u201d HOST 2016 (2016) 185 (DOI: 10.1109\/HST.2016.7495580)."},{"key":"21","unstructured":"[21] X. Xin, <i>et al.<\/i>: \u201cA configurable ring-oscillator-based PUF for Xilinx FPGAs,\u201d 2011 14th Euromicro Conference on Digital System Design (2011) 651 (DOI: 10.1109\/DSD.2011.88)."},{"key":"22","unstructured":"[22] Y. Dodis, <i>et al.<\/i>: \u201cFuzzy extractors: how to generate strong keys from biometrics and other noisy data,\u201d International Conference on the Theory and Applications of Cryptographic Techniques (2004) 523 (DOI: 10.1007\/978-3-540-24676-3-31)."},{"key":"23","unstructured":"[23] Y. Cui, <i>et al.<\/i>: \u201cLow-cost configurable ring oscillator PUF with improved uniqueness,\u201d ISCAS (2016) 558 (DOI: 10.1109\/ISCAS.2016.7527301)."},{"key":"24","unstructured":"[24] J. Gan, <i>et al.<\/i>: \u201cA FPGA-based RO PUF with LUT-based self-compare structure and adaptive counter time period tuning,\u201d ISCAS (2018) 1 (DOI: 10.1109\/ISCAS.2018.8351014)."},{"key":"25","unstructured":"[25] J.-L. Zhang, <i>et al.<\/i>: \u201cTechniques for design and implementation of an FPGA-specific physical unclonable function,\u201d J. Comput. Sci. Technol. <b>31<\/b> (2016) 124 (DOI: 10.1007\/s11390-016-1616-8)."},{"key":"26","unstructured":"[26] M. Majzoobi, <i>et al.<\/i>: \u201cFPGA-based true random number generation using circuit metastability with adaptive feedback control,\u201d CHES 2011 (2011) 17 (DOI: 10.1007\/978-3-642-23951-9-2)."},{"key":"27","unstructured":"[27] Q. Zhang, <i>et al.<\/i>: \u201cFRO PUF: how to extract more entropy from two ring oscillators in FPGA-based PUFs,\u201d International Conference on Security and Privacy in Communication Systems (2016) 675 (DOI: 10.1007\/978-3-319-59608-2-37)."},{"key":"28","unstructured":"[28] Y. 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