{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,13]],"date-time":"2026-05-13T06:45:02Z","timestamp":1778654702019,"version":"3.51.4"},"reference-count":31,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"24","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Electron. Express"],"published-print":{"date-parts":[[2020,12,25]]},"DOI":"10.1587\/elex.17.20200389","type":"journal-article","created":{"date-parts":[[2020,12,6]],"date-time":"2020-12-06T22:06:08Z","timestamp":1607292368000},"page":"20200389-20200389","source":"Crossref","is-referenced-by-count":3,"title":["A dual dynamic key chaotic encryption system for industrial cyber-physical systems"],"prefix":"10.1587","volume":"17","author":[{"given":"Guangqiang","family":"Qiu","sequence":"first","affiliation":[{"name":"Zhejiang Engineering Laboratory of Industrial Internet Communication Technology, Zhejiang Sci-Tech University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chengqun","family":"Wang","sequence":"additional","affiliation":[{"name":"Zhejiang Engineering Laboratory of Industrial Internet Communication Technology, Zhejiang Sci-Tech University"},{"name":"State Key Laboratory of Synthetical Automation for Process Industries, Northeastern University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shuyun","family":"Luo","sequence":"additional","affiliation":[{"name":"Zhejiang Engineering Laboratory of Industrial Internet Communication Technology, Zhejiang Sci-Tech University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Weiqiang","family":"Xu","sequence":"additional","affiliation":[{"name":"Zhejiang Engineering Laboratory of Industrial Internet Communication Technology, Zhejiang Sci-Tech University"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"532","reference":[{"key":"1","unstructured":"[1] H. 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Gillela, <i>et al.<\/i>: \u201cParallelization of brute-force attack on MD5 hash algorithm on FPGA,\u201d 2019 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID) (2019) (DOI: 10.1109\/VLSID.2019.00034)."}],"container-title":["IEICE Electronics Express"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/17\/24\/17_17.20200389\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,12,26]],"date-time":"2020-12-26T03:25:40Z","timestamp":1608953140000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/17\/24\/17_17.20200389\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,12,25]]},"references-count":31,"journal-issue":{"issue":"24","published-print":{"date-parts":[[2020]]}},"URL":"https:\/\/doi.org\/10.1587\/elex.17.20200389","relation":{},"ISSN":["1349-2543"],"issn-type":[{"value":"1349-2543","type":"electronic"}],"subject":[],"published":{"date-parts":[[2020,12,25]]}}}