{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,6]],"date-time":"2024-08-06T06:05:38Z","timestamp":1722924338477},"reference-count":31,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"10","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Electron. Express"],"published-print":{"date-parts":[[2022,5,25]]},"DOI":"10.1587\/elex.19.20220051","type":"journal-article","created":{"date-parts":[[2022,3,21]],"date-time":"2022-03-21T22:09:35Z","timestamp":1647900575000},"page":"20220051-20220051","source":"Crossref","is-referenced-by-count":5,"title":["A fully integrated 5pF output capacitor, MOS-only reference, 55-nm LDO with optimized area and power for SoC applications"],"prefix":"10.1587","volume":"19","author":[{"given":"Yanxia","family":"Yao","sequence":"first","affiliation":[{"name":"College of Information Science & Electronic Engineering, Zhejiang University"}]},{"given":"Menglian","family":"Zhao","sequence":"additional","affiliation":[{"name":"College of Information Science & Electronic Engineering, Zhejiang University"}]},{"given":"Xiaobo","family":"Wu","sequence":"additional","affiliation":[{"name":"College of Information Science & Electronic Engineering, Zhejiang University"}]}],"member":"532","reference":[{"key":"1","doi-asserted-by":"crossref","unstructured":"[1] H.R. Kooshkaki, <i>et al<\/i>.: \u201cA 0.55mW fractional-N PLL with a DC-DC powered class-D VCO achieving better than-66dBc fractional and reference spurs for NB-IoT,\u201d IEEE Cust. Integr. Circuits Conf. (2020) 1 (DOI: 10.1109\/CICC48029.2020.9075944).","DOI":"10.1109\/CICC48029.2020.9075944"},{"key":"2","doi-asserted-by":"crossref","unstructured":"[2] S. Li, <i>et al<\/i>.: \u201cAn 85nW IoT node-controlling SoC for MELs power-mode management and phantom energy reduction,\u201d IEEE Int. Symp. Circuits Sys. (2020) 1 (DOI: 10.1109\/ISCAS45731.2020.9180473).","DOI":"10.1109\/ISCAS45731.2020.9180473"},{"key":"3","doi-asserted-by":"crossref","unstructured":"[3] S.C. Chandrarathna, <i>et al<\/i>.: \u201cA 580nW dual-input energy harvester IC using multi-task MPPT and a current boost converter for heterogeneous source combining,\u201d IEEE Trans. Circuits Syst. I, Reg. Papers <b>67<\/b> (2020) 5650 (DOI: 10.1109\/TCSI.2020.3015989).","DOI":"10.1109\/TCSI.2020.3015989"},{"key":"4","doi-asserted-by":"crossref","unstructured":"[4] V. Shirmohammadli, <i>et al<\/i>.: \u201cLow power output-capacitorless class-AB CMOS LDO regulator,\u201d IEEE Int. Symp. Circuits Sys. (2017) 1 (DOI: 10.1109\/ISCAS.2017.8050958).","DOI":"10.1109\/ISCAS.2017.8050958"},{"key":"5","doi-asserted-by":"crossref","unstructured":"[5] J. Zhao, <i>et al<\/i>.: \u201cA 0.5-to-1.2V, 310nA quiescent current, 3fs-FoM time-domain output-capacitorless LDO with propagation-delay-triggered edge detector,\u201d IEEE Asian Solid-State Circuits Conf. (2020) 1 (DOI: 10.1109\/A-SSCC48613.2020.9336121).","DOI":"10.1109\/A-SSCC48613.2020.9336121"},{"key":"6","doi-asserted-by":"crossref","unstructured":"[6] G. Li, <i>et al<\/i>.: \u201cDual active-feedback frequency compensation for output-capacitorless LDO with transient and stability enhancement in 65-nm CMOS,\u201d IEEE Trans. Power Electron. <b>35<\/b> (2020) 415 (DOI: 10.1109\/TPEL.2019.2910557).","DOI":"10.1109\/TPEL.2019.2910557"},{"key":"7","doi-asserted-by":"crossref","unstructured":"[7] J. Guo, <i>et al<\/i>.: \u201cA 6-\u00b5W chip-area-efficient output-capacitorless LDO in 90-nm CMOS technology,\u201d IEEE J. Solid-State Circuits <b>45<\/b> (2010) 1896 (DOI: 10.1109\/JSSC.2010.2053859).","DOI":"10.1109\/JSSC.2010.2053859"},{"key":"8","doi-asserted-by":"crossref","unstructured":"[8] J. P\u00e9rez-Bail\u00f3n, <i>et al<\/i>.: \u201cTransient-enhanced output-capacitorless CMOS LDO regulator for battery-operated systems,\u201d IEEE Int. Symp. Circuits Sys. (2017) 1 (DOI: 10.1109\/ISCAS.2017.8050961).","DOI":"10.1109\/ISCAS.2017.8050961"},{"key":"9","doi-asserted-by":"crossref","unstructured":"[9] X. Han, <i>et al<\/i>.: \u201cAn output-capacitor-free adaptively biased LDO regulator with robust frequency compensation in 0.13\u00b5m CMOS for SoC application,\u201d IEEE Int. Symp. Circuits Sys. (2016) 2699 (DOI: 10.1109\/ISCAS.2016.7539150).","DOI":"10.1109\/ISCAS.2016.7539150"},{"key":"10","doi-asserted-by":"crossref","unstructured":"[10] M. El-Nozahi, <i>et al<\/i>.: \u201cHigh PSR low drop-out regulator with feed-forward ripple cancellation technique,\u201d IEEE J. Solid-State Circuits <b>45<\/b> (2010) 565 (DOI: 10.1109\/JSSC.2009.2039685).","DOI":"10.1109\/JSSC.2009.2039685"},{"key":"11","doi-asserted-by":"crossref","unstructured":"[11] M. Ho, <i>et al<\/i>.: \u201cA low-power fast-transient 90-nm low dropout regulator with multiple small-gain stages,\u201d IEEE J. Solid-State Circuits <b>45<\/b> (2010) 2466 (DOI: 10.1109\/JSSC.2010.2072611).","DOI":"10.1109\/JSSC.2010.2072611"},{"key":"12","doi-asserted-by":"crossref","unstructured":"[12] A. Santra and Q.A. Khan: \u201cA power efficient output capacitor-less LDO regulator with auto-low power mode and using feed-forward compensation,\u201d 2019 32nd Int. Conf. VLSI Design and 2019 18th Int. Conf. Embedded Sys. (2019) 36 (DOI: 10.1109\/VLSID.2019.00025).","DOI":"10.1109\/VLSID.2019.00025"},{"key":"13","doi-asserted-by":"crossref","unstructured":"[13] N. Liu and D. Chen: \u201cA transient-enhanced output-capacitorless LDO with fast local loop and overshoot detection,\u201d IEEE Trans. Circuits Syst. I, Reg. Papers <b>67<\/b> (2020) 3422 (DOI: 10.1109\/TCSI.2020.2991747).","DOI":"10.1109\/TCSI.2020.2991747"},{"key":"14","doi-asserted-by":"crossref","unstructured":"[14] A. Far: \u201cSubthreshold bandgap voltage reference aiming for energy harvesting: 100na, 5ppm\/c, 40ppm\/v, psrr -88db,\u201d 2015 IEEE 5th Intern. Conf. Consumer Electron. (2015) 310 (DOI: 10.1109\/ICCE-Berlin.2015.7391266).","DOI":"10.1109\/ICCE-Berlin.2015.7391266"},{"key":"15","doi-asserted-by":"crossref","unstructured":"[15] L. Wang, <i>et al<\/i>.: \u201cA 0.9-V 33.7-ppm\/\u00b0C 85-nW sub-bandgap voltage reference consisting of subthreshold MOSFETs and single BJT,\u201d IEEE Trans. Very Large Scale Integr. (VLSI) Syst. <b>26<\/b> (2018) 2190 (DOI: 10.1109\/TVLSI.2018.2836331).","DOI":"10.1109\/TVLSI.2018.2836331"},{"key":"16","doi-asserted-by":"crossref","unstructured":"[16] F. Lavalle-Aviles, <i>et al<\/i>.: \u201cA high power supply rejection and fast settling time capacitor-less LDO,\u201d IEEE Trans. Power Electron. <b>34<\/b> (2019) 474 (DOI: 10.1109\/TPEL.2018.2826922).","DOI":"10.1109\/TPEL.2018.2826922"},{"key":"17","doi-asserted-by":"crossref","unstructured":"[17] S.O. Cannizzaro, <i>et al<\/i>.: \u201cDesign procedures for three-stage CMOS OTAs with nested-miller compensation,\u201d IEEE Trans. Circuits Syst. I, Reg. Papers <b>54<\/b> (2007) 933 (DOI: 10.1109\/TCSI.2007.895520).","DOI":"10.1109\/TCSI.2007.895520"},{"key":"18","doi-asserted-by":"crossref","unstructured":"[18] Y. Yao, <i>et al<\/i>.: \u201cA max 2.3\u00b5A quiescent current external capacitorless low-dropout regulator,\u201d The 46th Annual Conf. of the IEEE Ind. Electron. Soc. (2020) 2239 (DOI: 10.1109\/IECON43393.2020.9254563).","DOI":"10.1109\/IECON43393.2020.9254563"},{"key":"19","doi-asserted-by":"crossref","unstructured":"[19] K. Li, <i>et al<\/i>.: \u201cA multi-loop slew-rate-enhanced NMOS LDO handling 1-A-load-current step with fast transient for 5G applications,\u201d IEEE J. Solid-State Circuits <b>55<\/b> (2020) 3076 (DOI: 10.1109\/JSSC.2020.3005789).","DOI":"10.1109\/JSSC.2020.3005789"},{"key":"20","doi-asserted-by":"crossref","unstructured":"[20] M. Khan, <i>et al<\/i>.: \u201cCapacitor-less low-dropout regulator (LDO) with improved PSRR and enhanced slew-rate,\u201d IEEE Int. Symp. Circuits Sys. (2018) 1 (DOI: 10.1109\/ISCAS.2018.8351039).","DOI":"10.1109\/ISCAS.2018.8351039"},{"key":"21","doi-asserted-by":"crossref","unstructured":"[21] B. Wang, <i>et al<\/i>.: \u201cPrecision CMOS voltage reference exploiting silicon bandgap narrowing effect,\u201d IEEE Trans. Electron Devices <b>62<\/b> (2015) 2128 (DOI: 10.1109\/TED.2015.2434495).","DOI":"10.1109\/TED.2015.2434495"},{"key":"22","doi-asserted-by":"crossref","unstructured":"[22] L. Wang, <i>et al<\/i>.: \u201cA 0.9-V 33.7-ppm\/\u00b0C 85-nW sub-bandgap voltage reference consisting of subthreshold MOSFETs and single BJT,\u201d IEEE Trans. Very Large Scale Integr. (VLSI) Syst. <b>26<\/b> (2018) 2190 (DOI: 10.1109\/TVLSI.2018.2836331).","DOI":"10.1109\/TVLSI.2018.2836331"},{"key":"23","doi-asserted-by":"crossref","unstructured":"[23] G.D. Vita, <i>et al<\/i>.: \u201cA sub-1V, 10ppm\/\u00b0C, nanopower voltage reference generator,\u201d 2006 Proceedings of the 32nd European Solid-State Circuits Conf. (2006) 307 (DOI: 10.1109\/ESSCIR.2006.307592).","DOI":"10.1109\/ESSCIR.2006.307592"},{"key":"24","unstructured":"[24] B. Razavi, <i>et al<\/i>.: <i>Design of Analog CMOS Integrated Circuits<\/i> (McGraw-Hill Education, 2016) 2nd ed."},{"key":"25","unstructured":"[25] A. Wang, <i>et al<\/i>.: <i>Sub-Threshold Design for Ultra Low-Power Systems<\/i> (Springer, New York, 2006) (DOI: 10.1007\/978-0-387-34501-7)."},{"key":"26","doi-asserted-by":"crossref","unstructured":"[26] Y. Lu, <i>et al<\/i>.: \u201cA fully-integrated low-dropout regulator with full-spectrum power supply rejection,\u201d IEEE Trans. Circuits Syst. I, Reg. Papers <b>62<\/b> (2015) 707 (DOI: 10.1109\/TCSI.2014.2380644).","DOI":"10.1109\/TCSI.2014.2380644"},{"key":"27","doi-asserted-by":"crossref","unstructured":"[27] D. Kim, <i>et al<\/i>.: \u201cA 0.5V-V<sub>IN<\/sub> 1.44mA-class event-driven digital LDO with a fully integrated 100pF output capacitor,\u201d IEEE Int. Solid-State Circuits Conf. (2017) 346 (DOI: 10.1109\/ISSCC.2017.7870403).","DOI":"10.1109\/ISSCC.2017.7870403"},{"key":"28","doi-asserted-by":"crossref","unstructured":"[28] L.G. Salem, <i>et al<\/i>.: \u201c20.3A 100nA-to-2mA successive-approximation digital LDO with PD compensation and sub-LSB duty control achieving a 15.1ns response time at 0.5V,\u201d IEEE Int. Solid-State Circuits Conf. (2017) 340 (DOI: 10.1109\/ISSCC.2017.7870400).","DOI":"10.1109\/ISSCC.2017.7870400"},{"key":"29","doi-asserted-by":"crossref","unstructured":"[29] P. Manikandan and B. Bindu: \u201cHigh-PSR capacitorless LDO with adaptive circuit for varying loads,\u201d J. Circuits, Sys. Comp. <b>29<\/b> (2020) 2050178 (DOI: 10.1142\/S0218126620501789).","DOI":"10.1142\/S0218126620501789"},{"key":"30","doi-asserted-by":"crossref","unstructured":"[30] S. Kundu, <i>et al<\/i>.: \u201cA fully integrated 40pF output capacitor beat-frequency-quantizer-based digital LDO with built-in adaptive sampling and active voltage positioning,\u201d IEEE International Solid-St. Circ. Con. (2018) 308 (DOI: 10.1109\/ISSCC.2018.8310307).","DOI":"10.1109\/ISSCC.2018.8310307"},{"key":"31","doi-asserted-by":"crossref","unstructured":"[31] Y. Zhang, <i>et al<\/i>.: \u201cA capacitor-less ripple-less hybrid LDO with exponential ratio array and 4000x load current range,\u201d IEEE Trans. Circuits Syst. II, Exp. Briefs <b>66<\/b> (2019) 36 (DOI: 10.1109\/TCSII.2018.2834899).","DOI":"10.1109\/TCSII.2018.2834899"}],"container-title":["IEICE Electronics Express"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/19\/10\/19_19.20220051\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,28]],"date-time":"2022-05-28T04:51:43Z","timestamp":1653713503000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/19\/10\/19_19.20220051\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,5,25]]},"references-count":31,"journal-issue":{"issue":"10","published-print":{"date-parts":[[2022]]}},"URL":"https:\/\/doi.org\/10.1587\/elex.19.20220051","relation":{},"ISSN":["1349-2543"],"issn-type":[{"value":"1349-2543","type":"electronic"}],"subject":[],"published":{"date-parts":[[2022,5,25]]},"article-number":"19.20220051"}}