{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,25]],"date-time":"2026-02-25T00:28:35Z","timestamp":1771979315041,"version":"3.50.1"},"reference-count":30,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"8","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Electron. Express"],"published-print":{"date-parts":[[2022,4,25]]},"DOI":"10.1587\/elex.19.20220099","type":"journal-article","created":{"date-parts":[[2022,3,15]],"date-time":"2022-03-15T22:08:51Z","timestamp":1647382131000},"page":"20220099-20220099","source":"Crossref","is-referenced-by-count":5,"title":["An 11-bit 0.008mm&lt;sup&gt;2&lt;\/sup&gt; charge-redistribution digital-to-analog converter operating at cryogenic temperature for large-scale qubit arrays"],"prefix":"10.1587","volume":"19","author":[{"given":"Takuji","family":"Miki","sequence":"first","affiliation":[{"name":"Graduate School of Science, Technology and Innovation, Kobe University"}]},{"given":"Ryozo","family":"Takahashi","sequence":"additional","affiliation":[{"name":"Graduate School of System Informatics, Kobe University"}]},{"given":"Makoto","family":"Nagata","sequence":"additional","affiliation":[{"name":"Graduate School of Science, Technology and Innovation, Kobe University"}]}],"member":"532","reference":[{"key":"1","unstructured":"[1] F. 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Papers (2007) 314 (DOI: 10.1109\/ISSCC.2007.373420).","DOI":"10.1109\/ISSCC.2007.373420"}],"container-title":["IEICE Electronics Express"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/19\/8\/19_19.20220099\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,4,30]],"date-time":"2022-04-30T05:06:03Z","timestamp":1651295163000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/19\/8\/19_19.20220099\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,4,25]]},"references-count":30,"journal-issue":{"issue":"8","published-print":{"date-parts":[[2022]]}},"URL":"https:\/\/doi.org\/10.1587\/elex.19.20220099","relation":{},"ISSN":["1349-2543"],"issn-type":[{"value":"1349-2543","type":"electronic"}],"subject":[],"published":{"date-parts":[[2022,4,25]]},"article-number":"19.20220099"}}