{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,6,29]],"date-time":"2022-06-29T21:54:30Z","timestamp":1656539670050},"reference-count":30,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"11","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Electron. Express"],"published-print":{"date-parts":[[2022,6,10]]},"DOI":"10.1587\/elex.19.20220180","type":"journal-article","created":{"date-parts":[[2022,5,5]],"date-time":"2022-05-05T22:09:24Z","timestamp":1651788564000},"page":"20220180-20220180","source":"Crossref","is-referenced-by-count":0,"title":["A 2.5-Vpp PVT-insensitive high dynamic range output stage using bulk voltages adjustment"],"prefix":"10.1587","volume":"19","author":[{"given":"Xiangcheng","family":"Liu","sequence":"first","affiliation":[{"name":"State Key Lab of ASIC & System, Fudan University"}]},{"given":"Yingyu","family":"Chen","sequence":"additional","affiliation":[{"name":"State Key Lab of ASIC & System, Fudan University"}]},{"given":"Zhangwen","family":"Tang","sequence":"additional","affiliation":[{"name":"State Key Lab of ASIC & System, Fudan University"}]}],"member":"532","reference":[{"key":"1","doi-asserted-by":"crossref","unstructured":"[1] B. Hershberg, <i>et al<\/i>.: \u201cRing amplifiers for switched capacitor circuits,\u201d IEEE J. Solid-State Circuits <b>47<\/b> (2012) 2928 (DOI: 10.1109\/jssc.2012.2217865).","DOI":"10.1109\/JSSC.2012.2217865"},{"key":"2","doi-asserted-by":"crossref","unstructured":"[2] J. Lin, <i>et al.<\/i>: \u201cA 15.5dB, wide signal swing, dynamic amplifier using a common-mode voltage detection technique,\u201d IEEE International Symposium on Circuits and Systems (ISCAS) (2011) 21 (DOI: 10.1109\/iscas.2011.5937491).","DOI":"10.1109\/ISCAS.2011.5937491"},{"key":"3","doi-asserted-by":"crossref","unstructured":"[3] Y. Lim, <i>et al.<\/i>: \u201c11.5A 100MS\/s 10.5b 2.46mW comparator-less pipeline ADC using self-biased ring amplifiers,\u201d ISSCC Dig. Tech. Papers (2014) 202 (DOI: 10.1109\/ISSCC.2014.6757400).","DOI":"10.1109\/ISSCC.2014.6757400"},{"key":"4","doi-asserted-by":"crossref","unstructured":"[4] C. Lee, <i>et al.<\/i>: \u201cA replica-driving technique for high performance SC circuits and pipelined ADC design,\u201d IEEE Trans. Circuits Syst. II, Exp. Briefs <b>60<\/b> (2013) 557 (DOI: 10.1109\/TCSII.2013.2268432).","DOI":"10.1109\/TCSII.2013.2268432"},{"key":"5","doi-asserted-by":"crossref","unstructured":"[5] M.S. Akter, <i>et al.<\/i>: \u201cA capacitively degenerated 100-dB linear 20-150MS\/s dynamic amplifier,\u201d IEEE J. Solid-State Circuits <b>53<\/b> (2018) 1115 (DOI: 10.1109\/jssc.2017.2778277).","DOI":"10.1109\/JSSC.2017.2778277"},{"key":"6","doi-asserted-by":"crossref","unstructured":"[6] K. Gotoh, <i>et al.<\/i>: \u201cA 1.0-V 10-b 30-MS\/s 3.4-mW rail-to-rail pipelined ADC using a new front-end MDAC,\u201d IEICE Electron. Express <b>6<\/b> (2009) 198 (DOI: 10.1587\/elex.6.198).","DOI":"10.1587\/elex.6.198"},{"key":"7","doi-asserted-by":"crossref","unstructured":"[7] B. Hershberg, <i>et al.<\/i>: \u201cDesign of a split-CLS pipelined ADC with full signal swing using an accurate but fractional signal swing opamp,\u201d IEEE J. Solid-State Circuits <b>45<\/b> (2010) 2623 (DOI: 10.1109\/JSSC.2010.2073190).","DOI":"10.1109\/JSSC.2010.2073190"},{"key":"8","doi-asserted-by":"crossref","unstructured":"[8] M.-J. Seo, <i>et al.<\/i>: \u201cA single-supply CDAC-based buffer-embedding SAR ADC with skip-reset scheme having inherent chopping capability,\u201d IEEE J. Solid-State Circuits <b>55<\/b> (2020) 2660 (DOI: 10.1109\/jssc.2020.3006450).","DOI":"10.1109\/JSSC.2020.3006450"},{"key":"9","doi-asserted-by":"crossref","unstructured":"[9] B. Vigraham, <i>et al.<\/i>: \u201cSwitched-mode operational amplifiers and their application to continuous-time filters in nanoscale CMOS,\u201d IEEE J. Solid-State Circuits <b>49<\/b> (2014) 2758 (DOI: 10.1109\/JSSC.2014.2354641).","DOI":"10.1109\/JSSC.2014.2354641"},{"key":"10","doi-asserted-by":"crossref","unstructured":"[10] A. Parisi, <i>et al.<\/i>: \u201cA 1-V 7th-order SC low-pass filter for 77-GHz automotive radar in 28-nm FD-SOI CMOS,\u201d Electronics <b>10<\/b> (2021) 1466 (DOI: 10.3390\/electronics10121466).","DOI":"10.3390\/electronics10121466"},{"key":"11","doi-asserted-by":"crossref","unstructured":"[11] C. Knochenhauer, <i>et al.<\/i>: \u201cA compact, low-power 40-GBit\/s modulator driver with 6-V differential output swing in 0.25-um SiGe BiCMOS,\u201d IEEE J. Solid-State Circuits <b>46<\/b> (2011) 1137 (DOI: 10.1109\/JSSC.2011.2111090).","DOI":"10.1109\/JSSC.2011.2111090"},{"key":"12","doi-asserted-by":"crossref","unstructured":"[12] J. Hoffman, <i>et al.<\/i>: \u201cAnalog circuit blocks for 80-GHz bandwidth frequency-interleaved, linear, large-swing front-ends,\u201d IEEE J. Solid-State Circuits <b>51<\/b> (2016) 1985 (DOI: 10.1109\/JSSC.2016.2567445).","DOI":"10.1109\/JSSC.2016.2567445"},{"key":"13","doi-asserted-by":"crossref","unstructured":"[13] Y. Chen, <i>et al.<\/i>: \u201cA 0.4-V 6.6-\u00b5W 75-dB SNDR delta-sigma modulator employing gate-body-driven amplifier with local CMFB loop and robust clock generator for implantable biomedical devices,\u201d IEICE Electron. Express <b>17<\/b> (2020) 20200117 (DOI: 10.1587\/elex.17.20200117).","DOI":"10.1587\/elex.17.20200117"},{"key":"14","doi-asserted-by":"crossref","unstructured":"[14] D. Krishnamoorthy, <i>et al.<\/i>: \u201cLow voltage delta-sigma modulator with full range and unidirectional output,\u201d IEICE Electron. Express <b>12<\/b> (2015) 20141067 (DOI: 10.1587\/elex.12.20141067).","DOI":"10.1587\/elex.12.20141067"},{"key":"15","doi-asserted-by":"crossref","unstructured":"[15] A.H. Ahmed, <i>et al.<\/i>: \u201cA dual-polarization silicon-photonic coherent transmitter supporting 552Gb\/s\/wavelength,\u201d IEEE J. Solid-State Circuits <b>55<\/b> (2020) 2597 (DOI: 10.1109\/jssc2020.2988399).","DOI":"10.1109\/JSSC.2020.2988399"},{"key":"16","doi-asserted-by":"crossref","unstructured":"[16] H. Ramon, <i>et al.<\/i>: \u201cA DC-coupled 50Gb\/s 0.064pJ\/bit thin-oxide level shifter in 28nm FDSOI CMOS,\u201d IEICE Electron. Express <b>15<\/b> (2018) (DOI: 10.1587\/elex.15.20171085).","DOI":"10.1587\/elex.15.20171085"},{"key":"17","doi-asserted-by":"crossref","unstructured":"[17] T. Sai, <i>et al.<\/i>: \u201c2\/3 and 1\/3 reconfigurable switched capacitor DC-DC converter with 92.9% efficiency at 62mW\/mm<sup>2<\/sup> using driver amplitude doubler,\u201d IEEE Trans. Circuits Syst. II, Exp. Briefs <b>65<\/b> (2018) 1654 (DOI: 10.1109\/TCSII.2017.2762347).","DOI":"10.1109\/TCSII.2017.2762347"},{"key":"18","doi-asserted-by":"crossref","unstructured":"[18] Y. Chae and G. Han: \u201cLow voltage, low power, inverter-based switched-capacitor delta-sigma modulator,\u201d IEEE J. Solid-State Circuits <b>44<\/b> (2009) 458 (DOI: 10.1109\/jssc.2008.2010973).","DOI":"10.1109\/JSSC.2008.2010973"},{"key":"19","doi-asserted-by":"crossref","unstructured":"[19] T. Stockstad and H. Yoshizawa: \u201cA 0.9-V 0.5-mu a rail-to-rail CMOS operational amplifier,\u201d IEEE J. Solid-State Circuits <b>37<\/b> (2002) 286 (DOI: 10.1109\/4.987079).","DOI":"10.1109\/4.987079"},{"key":"20","doi-asserted-by":"crossref","unstructured":"[20] S. Dong, <i>et al.<\/i>: \u201cA transconductance-enhancement cascode Miller compensation for low-power multistage amplifiers,\u201d Microelectronics Journal <b>73<\/b> (2018) 94 (DOI: 10.1016\/j.mejo.2018.01.009).","DOI":"10.1016\/j.mejo.2018.01.009"},{"key":"21","doi-asserted-by":"crossref","unstructured":"[21] Y. Lim, <i>et al.<\/i>: \u201c26.1A 1mW 71.5dB SNDR 50MS\/S 13b fully differential ring-amplifier-based SAR-assisted pipeline ADC,\u201d ISSCC Dig. Tech. Papers (2015) 1 (DOI: 10.1109\/ISSCC 2015.7063124).","DOI":"10.1109\/ISSCC.2015.7063124"},{"key":"22","doi-asserted-by":"crossref","unstructured":"[22] H. Zhuang, <i>et al.<\/i>: \u201cA 7.6b ENOB, 16<i>\u00d7<\/i> gain, 360mVpp output swing, open-loop charge steering amplifier,\u201d IEEE Access <b>8<\/b> (2020) 203294 (DOI: 10.1109\/ACCESS.2020.3037228).","DOI":"10.1109\/ACCESS.2020.3037228"},{"key":"23","doi-asserted-by":"crossref","unstructured":"[23] J. Brunsilius, <i>et al.<\/i>: \u201cA 16b 80MS\/s 100mW 77.6dB SNR CMOS pipeline ADC,\u201d IEEE International Solid-State Circuits Conference (2011) 186 (DOI: 10.1109\/ISSCC.2011.5746275).","DOI":"10.1109\/ISSCC.2011.5746275"},{"key":"24","doi-asserted-by":"crossref","unstructured":"[24] V. Milovanovic, <i>et al.<\/i>: \u201cOn fully differential and complementary single-stage self-biased CMOS differential amplifiers,\u201d Eurocon (2013) 1955 (DOI: 10.1109\/EUROCON.2013.6625248).","DOI":"10.1109\/EUROCON.2013.6625248"},{"key":"25","doi-asserted-by":"crossref","unstructured":"[25] H. Yu, <i>et al.<\/i>: \u201cA 0.096-mm<sup>2<\/sup> 1-20-GHz triple-path noise-canceling common-gate common-source LNA with dual complementary pMOS-nMOS configuration,\u201d IEEE Trans. Microw. Theory Techn. <b>68<\/b> (2020) 144 (DOI: 10.1109\/TMTT.2019.2949796).","DOI":"10.1109\/TMTT.2019.2949796"},{"key":"26","doi-asserted-by":"crossref","unstructured":"[26] Z. Qin, <i>et al.<\/i>: \u201c0.5-V 70-nW rail-to-rail operational amplifier using a cross-coupled output stage,\u201d IEEE Trans. Circuits Syst. II, Exp. Briefs <b>63<\/b> (2016) 1009 (DOI: 10.1109\/TCSII.2016.2539081).","DOI":"10.1109\/TCSII.2016.2539081"},{"key":"27","doi-asserted-by":"crossref","unstructured":"[27] J. Fritzin, <i>et al.<\/i>: \u201cDesign and analysis of a class-D stage with harmonic suppression,\u201d IEEE Trans. Circuits Syst. I, Reg. Papers <b>59<\/b> (2012) 1178 (DOI: 10.1109\/TCSI.2011.2173389).","DOI":"10.1109\/TCSI.2011.2173389"},{"key":"28","doi-asserted-by":"crossref","unstructured":"[28] Y. Chen, <i>et al.<\/i>: \u201cA 0.4-V 0.2pJ\/step 90-dB SNDR 20-kHz CT delta-sigma modulator using class-AB amplifier with a novel local common-mode feedback,\u201d IEICE Electron. Express <b>16<\/b> (2019) 20190170 (DOI: 10.1587\/elex.16.20190170).","DOI":"10.1587\/elex.16.20190170"},{"key":"29","doi-asserted-by":"crossref","unstructured":"[29] Z. Wei, <i>et al.<\/i>: \u201c11b 60MHz pipelined ADC with inverter-based class AB amplifier in 28nm CMOS technology,\u201d IEICE Electron. Express <b>14<\/b> (2017) 20170047 (DOI: 10.1587\/elex.14.20170047).","DOI":"10.1587\/elex.14.20170047"},{"key":"30","doi-asserted-by":"crossref","unstructured":"[30] M. Yavari: \u201cA new class AB folded-cascode operational amplifier,\u201d IEICE Electron. Express <b>6<\/b> (2009) 395 (DOI: 10.1587\/elex.6.395).","DOI":"10.1587\/elex.6.395"}],"container-title":["IEICE Electronics Express"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/19\/11\/19_19.20220180\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,11]],"date-time":"2022-06-11T03:28:11Z","timestamp":1654918091000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/19\/11\/19_19.20220180\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,6,10]]},"references-count":30,"journal-issue":{"issue":"11","published-print":{"date-parts":[[2022]]}},"URL":"https:\/\/doi.org\/10.1587\/elex.19.20220180","relation":{},"ISSN":["1349-2543"],"issn-type":[{"value":"1349-2543","type":"electronic"}],"subject":[],"published":{"date-parts":[[2022,6,10]]},"article-number":"19.20220180"}}