{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,31]],"date-time":"2026-03-31T13:43:28Z","timestamp":1774964608511,"version":"3.50.1"},"reference-count":31,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"24","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Electron. Express"],"published-print":{"date-parts":[[2022,12,25]]},"DOI":"10.1587\/elex.19.20220465","type":"journal-article","created":{"date-parts":[[2022,11,15]],"date-time":"2022-11-15T22:09:51Z","timestamp":1668550191000},"page":"20220465-20220465","source":"Crossref","is-referenced-by-count":7,"title":["Investigation of endurance degradation for 3-D charge trap NAND flash memory with bandgap-engineered tunneling oxide"],"prefix":"10.1587","volume":"19","author":[{"given":"Jongwoo","family":"Kim","sequence":"first","affiliation":[{"name":"Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering and Computer Science, Seoul National University"}]},{"given":"Hyungjun","family":"Jo","sequence":"additional","affiliation":[{"name":"Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering and Computer Science, Seoul National University"}]},{"given":"Yonggyu","family":"Cho","sequence":"additional","affiliation":[{"name":"NAND Tech. Development Division, SK hynix Inc."}]},{"given":"Hyunyoung","family":"Shim","sequence":"additional","affiliation":[{"name":"NAND Tech. Development Division, SK hynix Inc."}]},{"given":"Jaesung","family":"Sim","sequence":"additional","affiliation":[{"name":"NAND Tech. Development Division, SK hynix Inc."}]},{"given":"Hyungcheol","family":"Shin","sequence":"additional","affiliation":[{"name":"Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering and Computer Science, Seoul National University"}]}],"member":"532","reference":[{"key":"1","doi-asserted-by":"crossref","unstructured":"[1] H. Tanaka, <i>et al<\/i>.: \u201cBit cost scalable technology with punch and plug process for ultra density flash memory,\u201d IEEE Symposium on VLSI Technology (2007) 14 (DOI: 10.1109\/VLSIT.2007.4339708).","DOI":"10.1109\/VLSIT.2007.4339708"},{"key":"2","unstructured":"[2] R. Katsumata, <i>et al<\/i>.: \u201cPipe-shaped BiCS flash memory with 16 stacked layers and multi-cell operation for ultra high density storage device,\u201d IEEE Symposium on VLSI Technology (2009)."},{"key":"3","doi-asserted-by":"crossref","unstructured":"[3] E.-S. Choi and S.-K. Park: \u201cDevice considerations for high density and highly reliable 3D NAND Flash cell in near future,\u201d IEEE Int. Electron Device Meeting (2012) 211 (DOI: 10.1109\/IEDM.2012.6479011).","DOI":"10.1109\/IEDM.2012.6479011"},{"key":"4","doi-asserted-by":"crossref","unstructured":"[4] H. Kim, <i>et al<\/i>.: \u201cEvolution of NAND flash memory: From 2D to 3D as a storage market leader,\u201d IEEE International Memory Workshop (2017) 1 (DOI: 10.1109\/IMW.2017.7939081).","DOI":"10.1109\/IMW.2017.7939081"},{"key":"5","doi-asserted-by":"crossref","unstructured":"[5] K. Parat and A. Goda: \u201cScaling trends in NAND flash,\u201d IEEE International Electron Devices Meeting (2018) 27 (DOI: 10.1109\/IEDM.2018.8614694).","DOI":"10.1109\/IEDM.2018.8614694"},{"key":"6","unstructured":"[6] M.-S Liang and C. Hu: \u201cElectron trapping in very thin thermal silicon dioxides,\u201d IEDM Tech. Dig. (1981) 396 (DOI: 10.1109\/IEDM.1981.190097)."},{"key":"7","doi-asserted-by":"crossref","unstructured":"[7] K.H. Lee and S.A. Campbell: \u201cThe kinetics of the oxide charge trapping and breakdown in ultrathin silicon dioxide,\u201d J. Appl. Phys. <b>73<\/b> (1993) 4434 (DOI: 10.1063\/1.352781).","DOI":"10.1063\/1.352781"},{"key":"8","doi-asserted-by":"crossref","unstructured":"[8] S.K. Lai and D.R. Young: \u201cEffects of avalanche injection of electrons into silicon dioxide- generation of fast and slow interface states,\u201d J. Appl. Phys. <b>52<\/b> (1981) 6231 (DOI: 10.1063\/1.328565).","DOI":"10.1063\/1.328565"},{"key":"9","doi-asserted-by":"crossref","unstructured":"[9] Y.-B. Park and D.K. Schroder: \u201cDegradation of thin tunnel gate oxide under constant fowler-nordheim current stress for a flash EEPROM,\u201d IEEE Trans. Electron Devices <b>45<\/b> (1998) 1361 (DOI: 10.1109\/16.678579).","DOI":"10.1109\/16.678579"},{"key":"10","unstructured":"[10] J.-D. Lee, <i>et al<\/i>.: \u201cDegradation of tunnel oxide by FN current stress and its effects on data retention characteristics of 90nm NAND flash memory cells,\u201d Proc. IRPS (2003) 497 (DOI: 10.1109\/RELPHY.2003.1197798)."},{"key":"11","doi-asserted-by":"crossref","unstructured":"[11] J.-D. Lee, <i>et al<\/i>.: \u201cEffect of interface trap generation and annihilation on the data retention characteristics of Flash memory cells,\u201d IEEE Trans. Electron Device Mater. Rel. <b>4<\/b> (2004) 110 (DOI: 10.1109\/TDMR.2004824360).","DOI":"10.1109\/TDMR.2004.824360"},{"key":"12","doi-asserted-by":"crossref","unstructured":"[12] A. Fayrushin, <i>et al<\/i>.: \u201cThe new program\/erase cycling degradation mechanism of NAND Flash memory devices,\u201d IEEE International Electron Device Meeting (2009) 823 (DOI: 10.1109\/IEDM.2009.5424213).","DOI":"10.1109\/IEDM.2009.5424213"},{"key":"13","doi-asserted-by":"crossref","unstructured":"[13] R. Shirota, <i>et al<\/i>.: \u201cNew method to analyze the shift of floating gate charge and generated tunnel oxide trapped charge profile in NAND flash memory by program\/erase endurance,\u201d IEEE Trans. Electron Devices <b>62<\/b> (2015) 114 (DOI: 10.1109\/TED.2014.2366116).","DOI":"10.1109\/TED.2014.2366116"},{"key":"14","doi-asserted-by":"crossref","unstructured":"[14] Y.-Y. Chiu, <i>et al<\/i>.: \u201cTransconductance distribution in program\/erase cycling of NAND flash memory devices: a statistical investigation,\u201d IEEE Trans. Electron Devices <b>66<\/b> (2019) 1255 (DOI: 10.1109\/TED.2019.2892794).","DOI":"10.1109\/TED.2019.2892794"},{"key":"15","doi-asserted-by":"crossref","unstructured":"[15] Y.-Y. Chiu, <i>et al<\/i>.: \u201cThe origin of oxide degradation during time interval between program\/erase cycles in NAND Flash memory devices,\u201d Jpn. J. Appl. Phys. <b>60<\/b> (2021) 070004 (DOI: 10.35848\/1347-4065\/ac0bee).","DOI":"10.35848\/1347-4065\/ac0bee"},{"key":"16","unstructured":"[16] H.-T. Lue, <i>et al<\/i>.: \u201cBE-SONOS: a bandgap engineered SONOS with excellent performance and reliability,\u201d IEDM Tech. Dig. (2005) 547 (DOI: 10.1109\/IEDM.2005.1609404)."},{"key":"17","doi-asserted-by":"crossref","unstructured":"[17] H.-T. Lue, <i>et al<\/i>.: \u201cModeling of barrier-engineered charge-trapping nand flash devices,\u201d IEEE Trans. Device Mater. Rel. <b>10<\/b> (2010) 222 (DOI: 10.1109\/TDMR.2010.2041665).","DOI":"10.1109\/TDMR.2010.2041665"},{"key":"18","doi-asserted-by":"crossref","unstructured":"[18] C. Caillat, <i>et al<\/i>.: \u201c3DNAND GIDL-assisted body biasing for erase enabling CMOS array (CUA) architecture,\u201d IEEE International Memory Workshop (2017) 1 (DOI: 10.1109\/IMW.2017.7939067).","DOI":"10.1109\/IMW.2017.7939067"},{"key":"19","doi-asserted-by":"crossref","unstructured":"[19] M. Kim, <i>et al<\/i>.: \u201cA compact model for ISPP of 3-D charge-trap NAND flash memories,\u201d IEEE Trans. Electron Devices <b>67<\/b> (2020) 3095 (DOI: 10.1109\/TED.2020.3000448).","DOI":"10.1109\/TED.2020.3000448"},{"key":"20","doi-asserted-by":"crossref","unstructured":"[20] A. Padovani, <i>et al<\/i>.: \u201cA comprehensive understanding of the erase of TANOS memories through charge separation experiments and simulations,\u201d IEEE Trans. Electron Devices <b>58<\/b> (2011) 3147 (DOI: 10.1109\/TED.2011.2159722).","DOI":"10.1109\/TED.2011.2159722"},{"key":"21","doi-asserted-by":"crossref","unstructured":"[21] G. Malavena, <i>et al<\/i>.: \u201cCompact modeling of GIDL-assisted erase in 3-D NAND Flash strings,\u201d J. Computational Electronics <b>18<\/b> (2019) 561 (DOI: 10.1007\/s10825-019-01328-0).","DOI":"10.1007\/s10825-019-01328-0"},{"key":"22","doi-asserted-by":"crossref","unstructured":"[22] Y.-Y. Liao and S.-F. Horng: \u201cThe effects of program\/erase cycles on the ONO stack layer in SONOS flash memory cell investigated by a variable-amplitude low-frequency charge-pumping technique,\u201d IEEE Trans. Device Mater. Rel. <b>9<\/b> (2009) 356 (DOI: 10.1109\/TDMR.2009.2020992).","DOI":"10.1109\/TDMR.2009.2020992"},{"key":"23","doi-asserted-by":"crossref","unstructured":"[23] G. Yoon, <i>et al<\/i>.: \u201cImpact of P\/E stress on trap profiles in bangap-engineered tunneling oxide of 3D NAND flash memory,\u201d IEEE Access <b>10<\/b> (2022) 62423 (DOI: 10.1109\/ACCESS.2022.3182397).","DOI":"10.1109\/ACCESS.2022.3182397"},{"key":"24","doi-asserted-by":"crossref","unstructured":"[24] H. Park, <i>et al<\/i>.: \u201cTunnel oxide degradation in TANOS device and its origin,\u201d Proc. Symp. VLSI Technol., System and Application (2010) 50 (DOI: 10.1109\/VTSA.2010.5488954).","DOI":"10.1109\/VTSA.2010.5488954"},{"key":"25","doi-asserted-by":"crossref","unstructured":"[25] G. Van den bosch, <i>et al<\/i>.: \u201cInvestigation of window instability in program\/erase cycling of TANOS NAND flash memory,\u201d IEEE International Memory Workshop (2009) 1 (DOI: 10.1109\/IMW.2009.5090596).","DOI":"10.1109\/IMW.2009.5090596"},{"key":"26","doi-asserted-by":"crossref","unstructured":"[26] W.-C. Chen, <i>et al<\/i>.: \u201cFirst theoretical modeling of the bandgap-engineered oxynitride tunneling dielectric for 3D flash memory device starting from the <i>ab initio<\/i> calculation of the band diagram to understand the programing, erasing and reliability,\u201d IEEE International Electron Device Meeting (2021) 174 (DOI: 10.1109\/IEDM19574.2021.9720585).","DOI":"10.1109\/IEDM19574.2021.9720585"},{"key":"27","doi-asserted-by":"crossref","unstructured":"[27] H. Jo, <i>et al<\/i>.: \u201cExtraction of mobility in 3-D NAND flash memory with poly-Si based macaroni structure,\u201d IEEE EDTM (2020) 1 (DOI: 10.1109\/EDTM47692.2020.9117961).","DOI":"10.1109\/EDTM47692.2020.9117961"},{"key":"28","doi-asserted-by":"crossref","unstructured":"[28] S. Fujii, <i>et al<\/i>.: \u201cInterface state in metal-oxide-nitride-silicon memories induced by hole injection during program\/erase cycle stress,\u201d Jpn. J. Appl. Phys. <b>51<\/b> (2012) 124302 (DOI: 10.1143\/JJAP.51.124302).","DOI":"10.1143\/JJAP.51.124302"},{"key":"29","doi-asserted-by":"crossref","unstructured":"[29] D.H. Kim, <i>et al<\/i>.: \u201cComparative investigation of endurance and bias temperature instability characteristics in metal-Al<sub>2<\/sub>O<sub>3<\/sub>-nitride-oxide-semiconductor (MANOS) and semiconductor-oxide-nitride-oxide-semiconductor (SONOS) charge trap flash memory,\u201d J. Semicond. Technol. Sci. <b>12<\/b> (2012) 449 (DOI: 10.5573\/JSTS.2012.12.4.449).","DOI":"10.5573\/JSTS.2012.12.4.449"},{"key":"30","doi-asserted-by":"crossref","unstructured":"[30] H.-T. Lue, <i>et al<\/i>.: \u201cUnderstanding barrier engineered charge-trapping NAND flash devices with and without high-K dielectric,\u201d IEEE IRPS (2009) 874 (DOI: 10.1109\/IRPS.2009.5173370).","DOI":"10.1109\/IRPS.2009.5173370"},{"key":"31","doi-asserted-by":"crossref","unstructured":"[31] S.-C. Lai, <i>et al<\/i>.: \u201cMA BE-SONOS: a bandgap engineered SONOS using metal gate and Al<sub>2<\/sub>O<sub>3<\/sub> blocking layer to overcome erase saturation,\u201d IEEE NVSMW (2007) 88 (DOI: 10.1109\/NVSMW.2007.4290593).","DOI":"10.1109\/NVSMW.2007.4290593"}],"container-title":["IEICE Electronics Express"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/19\/24\/19_19.20220465\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,12,31]],"date-time":"2022-12-31T04:25:54Z","timestamp":1672460754000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/19\/24\/19_19.20220465\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,12,25]]},"references-count":31,"journal-issue":{"issue":"24","published-print":{"date-parts":[[2022]]}},"URL":"https:\/\/doi.org\/10.1587\/elex.19.20220465","relation":{},"ISSN":["1349-2543"],"issn-type":[{"value":"1349-2543","type":"electronic"}],"subject":[],"published":{"date-parts":[[2022,12,25]]},"article-number":"19.20220465"}}