{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,20]],"date-time":"2026-02-20T18:49:34Z","timestamp":1771613374320,"version":"3.50.1"},"reference-count":33,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"18","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Electron. Express"],"published-print":{"date-parts":[[2023,9,25]]},"DOI":"10.1587\/elex.20.20230339","type":"journal-article","created":{"date-parts":[[2023,8,14]],"date-time":"2023-08-14T22:12:11Z","timestamp":1692051131000},"page":"20230339-20230339","source":"Crossref","is-referenced-by-count":4,"title":["Low-power and small-area 4-ch 25-Gb\/s transimpedance amplifiers in 65-nm CMOS process"],"prefix":"10.1587","volume":"20","author":[{"given":"Yasuhiro","family":"Takahashi","sequence":"first","affiliation":[{"name":"Faculty of Engineering, Gifu University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Daisuke","family":"Ito","sequence":"additional","affiliation":[{"name":"Faculty of Engineering, Gifu University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Makoto","family":"Nakamura","sequence":"additional","affiliation":[{"name":"Faculty of Engineering, Gifu University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Akira","family":"Tsuchiya","sequence":"additional","affiliation":[{"name":"School of Engineering, The University of Shiga Prefecture"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Toshiyuki","family":"Inoue","sequence":"additional","affiliation":[{"name":"School of Engineering, The University of Shiga Prefecture"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Keiji","family":"Kishine","sequence":"additional","affiliation":[{"name":"School of Engineering, The University of Shiga Prefecture"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"532","reference":[{"key":"1","unstructured":"[1] Ministry of Internal Affairs and Communications of Japan: \u201cAggregation and provisional calculation of internet traffic in Japan (as of May 2022),\u201d (2022) https:\/\/www.soumu.go.jp\/menu_news\/s-news\/01kiban04_02000210.html (accessed on 9 Feb. 2023<i><\/i>)."},{"key":"2","unstructured":"[2] \u201cCo-packaged optics collaboration,\u201d (2021) http:\/\/www.copackagedoptics.com (accessed on 10 Feb. 2023<i><\/i>)."},{"key":"3","unstructured":"[3] F. Koyama: \u201cHigh-speed VCSEL photonics for datacenter networks,\u201d Invited Lecture Notes of 2022 URSI-Japan Radio Science Meeting (JRSM 2022) (2022) http:\/\/www.ursi.jp\/content\/files\/JRSM2022\/ComD_Invited_Fumio_Koyama_URSI-JRSM-2022.pdf (accessed on 11 Feb. 2023<i><\/i>)."},{"key":"4","doi-asserted-by":"crossref","unstructured":"[4] C. Minkenberg, <i>et al<\/i>.: \u201cCo-packaged datacenter optics: Opportunities and challenges,\u201d IET Optoelectronics <b>15<\/b> (2021) 77 (DOI: 10.1049\/ote2.12020).","DOI":"10.1049\/ote2.12020"},{"key":"5","doi-asserted-by":"crossref","unstructured":"[5] S.-M. Park and H.-J. Yoo: \u201c1.25-Gb\/s regulated cascode CMOS transimpedance amplifier for Gigabit Ethernet applications,\u201d IEEE J. Solid-State Circuits <b>39<\/b> (2004) 112 (DOI: 10.1109\/JSSC.2003.820884).","DOI":"10.1109\/JSSC.2003.820884"},{"key":"6","doi-asserted-by":"crossref","unstructured":"[6] C. Kromer, <i>et al<\/i>.: \u201cA low-power 20-GHz 52-dB<i>\u03a9<\/i> transimpedance amplifier in 80-nm CMOS,\u201d IEEE J. Solid-State Circuits <b>39<\/b> (2004) 885 (DOI: 10.1109\/JSSC.2004.827807).","DOI":"10.1109\/JSSC.2004.827807"},{"key":"7","doi-asserted-by":"crossref","unstructured":"[7] B. Analui and A. Hajimiri: \u201cBandwidth enhancement for transimpedance amplifiers,\u201d IEEE J. Solid-State Circuits <b>39<\/b> (2004) 1263 (DOI: 10.1109\/JSSC.2004.831783).","DOI":"10.1109\/JSSC.2004.831783"},{"key":"8","doi-asserted-by":"crossref","unstructured":"[8] Z. Lu, <i>et al<\/i>.: \u201cBroad-band design techniques for transimpedance amplifiers,\u201d IEEE Trans. Circuit Syst. I, Reg. Papers <b>54<\/b> (2007) 590 (DOI: 10.1109\/TCSI.2006.887610).","DOI":"10.1109\/TCSI.2006.887610"},{"key":"9","doi-asserted-by":"crossref","unstructured":"[9] J.-D. Jin and S.S.H. Hsu: \u201cA 40-Gb\/s transimpedance amplifier in 0.18-\u00b5m CMOS technology,\u201d IEEE J. Solid-State Circuits <b>43<\/b> (2008) 1449 (DOI: 10.1109\/JSSC.2008.922735).","DOI":"10.1109\/JSSC.2008.922735"},{"key":"10","unstructured":"[10] S. Bashiri, <i>et al<\/i>.: \u201cA 40Gb\/s transimpedance amplifier in 65nm CMOS,\u201d Proc. IEEE Int. Symp. Circuits Syst. (ISCAS) (2010) 757 (DOI: 10.1109\/ISCAS.2010.5537465)."},{"key":"11","doi-asserted-by":"crossref","unstructured":"[11] T. Takemoto, <i>et al<\/i>.: \u201cA compact 4\u00d725-Gb\/s 3.0mW\/Gb\/s CMOS-based optical receiver for board-to-board interconnects,\u201d J. Lightw. Technol. <b>28<\/b> (2010) 3343 (DOI: 10.1109\/jlt.2010.2082494).","DOI":"10.1109\/JLT.2010.2082494"},{"key":"12","doi-asserted-by":"crossref","unstructured":"[12] F.Y. Liu, <i>et al<\/i>.: \u201c10-Gbps, 5.3-mW optical transmitter and receiver circuits in 40-nm CMOS,\u201d IEEE J. Solid-State Circuits <b>47<\/b> (2012) 2049 (DOI: 10.1109\/JSSC.2012.2197234).","DOI":"10.1109\/JSSC.2012.2197234"},{"key":"13","unstructured":"[13] J.-Y. Jiang, <i>et al<\/i>.: \u201c100Gb\/s ethernet chipsets in 65nm CMOS technology,\u201d Proc. IEEE Int. Solid-State Circuits Conf. Digest of Tech. Papers (ISSCC) (2013) 120 (DOI: 10.1109\/ISSCC.2013.6487663)."},{"key":"14","doi-asserted-by":"crossref","unstructured":"[14] D. Li, <i>et al<\/i>.: \u201cA low-noise design technique for high-speed CMOS optical receivers,\u201d IEEE J. Solid-State Circuits <b>49<\/b> (2014) 1437 (DOI: 10.1109\/JSSC.2014.2322868).","DOI":"10.1109\/JSSC.2014.2322868"},{"key":"15","unstructured":"[15] T. Takemoto, <i>et al<\/i>.: \u201cA 25-to-28Gb\/s high-sensitivity (-9.7dBm) 65nm CMOS optical receiver for board-to-board interconnects,\u201d IEEE J. Solid-State Circuits <b>49<\/b> (2014) 2259 (DOI: 10.1109\/JSSC.2014.2349976)."},{"key":"16","doi-asserted-by":"crossref","unstructured":"[16] R. Ding, <i>et al<\/i>.: \u201cA 40-GHz bandwidth transimpedance amplifier with adjustable gain-peaking in 65-nm CMOS,\u201d Proc. IEEE Int. Midwest Symp. Circuits Syst. (MWCAS) (2014) 965 (DOI: 10.1109\/MWSCAS.2014.6908577).","DOI":"10.1109\/MWSCAS.2014.6908577"},{"key":"17","doi-asserted-by":"crossref","unstructured":"[17] Y. Wang, <i>et al<\/i>.: \u201cA 3-mW 25-Gb\/s CMOS transimpedance amplifier with fully integrated low-dropout regulator for 100GbE systems,\u201d Proc. IEEE Radio Freq. Integr. Circuits Symp. (RFIC) (2013) 275 (DOI: 10.1109\/RFIC.2014.6851718).","DOI":"10.1109\/RFIC.2014.6851718"},{"key":"18","doi-asserted-by":"crossref","unstructured":"[18] P.-C. Chiang, <i>et al<\/i>.: \u201c4 \u00d7 25Gb\/s transceiver with optical front-end for 100GbE system in 65nm CMOS technology,\u201d IEEE J. Solid-State Circuits <b>50<\/b> (2015) 573 (DOI: 10.1109\/jssc.2014.2365700).","DOI":"10.1109\/JSSC.2014.2365700"},{"key":"19","doi-asserted-by":"crossref","unstructured":"[19] Y. Chen, <i>et al<\/i>.: \u201c4 \u00d7 25Gb\/s 2.6mW\/Gb\/s parallel optical receiver analog front-end for 100Gb\/s Ethernet,\u201d Microw. Opt. Technol. Lett. <b>57<\/b> (2015) 974 (DOI: 10.1002\/mop.28996).","DOI":"10.1002\/mop.28996"},{"key":"20","doi-asserted-by":"crossref","unstructured":"[20] F. Ashtiani and S.Z. Aflatouni: \u201cIntegrated electro-optical phase-locked loop for high resolution optical synthesis,\u201d Optics Express <b>25<\/b> (2017) 16171 (DOI: 10.1364\/OE.25.016171).","DOI":"10.1364\/OE.25.016171"},{"key":"21","doi-asserted-by":"crossref","unstructured":"[21] T. Kojima, <i>et al<\/i>.: \u201cBurst-mode CMOS transimpedance amplifier based on a regulated-cascode circuit with gain-mode switching,\u201d IEICE Trans. Fundamentals. <b>E102-A<\/b> (2019) 845 (DOI: 10.1587\/transfun.E102.A.845).","DOI":"10.1587\/transfun.E102.A.845"},{"key":"22","doi-asserted-by":"crossref","unstructured":"[22] H. Li, <i>et al<\/i>.: \u201cA 112Gb\/s PAM4 linear TIA with 0.96pJ\/bit energy efficiency in 28nm CMOS,\u201d Proc. IEEE Eur. Solid-State Circuits Conf. (ESSCIRC) (2018) 238 (DOI: 10.1109\/ESSCIRC.2018.8494285).","DOI":"10.1109\/ESSCIRC.2018.8494285"},{"key":"23","doi-asserted-by":"crossref","unstructured":"[23] S.G. Kim, <i>et al<\/i>.: \u201cA 40-GHz mirrored-cascode differential transimpedance amplifier in 65-nm CMOS,\u201d IEEE J. Solid-State Circuits <b>54<\/b> (2019) 1468 (DOI: 10.1109\/JSSC.2018.2886323).","DOI":"10.1109\/JSSC.2018.2886323"},{"key":"24","doi-asserted-by":"crossref","unstructured":"[24] X. Chen and Y. Takahashi: \u201cFloating active inductor based trans-impedance amplifier in 0.18\u00b5m CMOS technology for optical applications,\u201d MDPI Electronics <b>8<\/b> (2019) 1547 (DOI: 10.3390\/electronics8121547).","DOI":"10.3390\/electronics8121547"},{"key":"25","doi-asserted-by":"crossref","unstructured":"[25] A. Hida, <i>et al<\/i>.: \u201cA wideband current-reuse-RGC TIA circuit with low-power consumption, IEICE Electron Express <b>16<\/b> (2019) 20190615 (DOI: 10.1587\/elex.16.20190615).","DOI":"10.1587\/elex.16.20190615"},{"key":"26","doi-asserted-by":"crossref","unstructured":"[26] M. Raj, <i>et al<\/i>.: \u201cDesign of a 50-Gb\/s hybrid integrated Si-photonic optical link in 16-nm FinFET,\u201d IEEE J. Solid-State Circuits <b>55<\/b> (2020) 1086 (DOI: 10.1109\/JSSC.2019.2960487).","DOI":"10.1109\/JSSC.2019.2960487"},{"key":"27","doi-asserted-by":"crossref","unstructured":"[27] K. Fukuta, <i>et al<\/i>.: \u201c49.4-dB<i>\u03a9<\/i> 46.8-GHz multiple shunt-shunt feedback regulated cascode TIA in 0.25-\u00b5m InP-HBT process,\u201d Proc. IEEE Asia Pacific Microwave Conf. (APMC) (2020) 3 (DOI: 10.1109\/APMC47863.2020.9331382).","DOI":"10.1109\/APMC47863.2020.9331382"},{"key":"28","doi-asserted-by":"crossref","unstructured":"[28] Y. Hong, <i>et al<\/i>.: \u201cHigh-speed DD transmission using a silicon receiver co-integrated with a 28-nm CMOS gain-tunable fully-differential TIA,\u201d J. Lightw. Technol. <b>39<\/b> (2021) 1138 (DOI: 10.1109\/JLT.2020.3028221).","DOI":"10.1109\/JLT.2020.3028221"},{"key":"29","doi-asserted-by":"crossref","unstructured":"[29] T. Inoue, <i>et al<\/i>.: \u201cA burst-mode TIA with adaptive response and stable operation for in-vehicle optical networks,\u201d Proc. IEEE Int. Conf. Electronics Circuits and Syst. (ICECS) (2021) 4 (DOI: 10.1109\/ICECS53924.2021.9665522).","DOI":"10.1109\/ICECS53924.2021.9665522"},{"key":"30","doi-asserted-by":"crossref","unstructured":"[30] G. Zhou, <i>et al<\/i>.: \u201c4-channel, 100Gbps inductorless optical receiver analog front-end in CMOS for optical interconnect,\u201d IEEE Access <b>9<\/b> (2021) 131780 (DOI: 10.1109\/access.2021.3114499).","DOI":"10.1109\/ACCESS.2021.3114499"},{"key":"31","doi-asserted-by":"crossref","unstructured":"[31] Y. Takahashi, <i>et al<\/i>.: \u201cLow-power regulated cascode CMOS transimpedance amplifier with local feedback circuit,\u201d MDPI Electronics <b>11<\/b> (2022) 854 (DOI: 10.3390\/electronics11060854).","DOI":"10.3390\/electronics11060854"},{"key":"32","doi-asserted-by":"crossref","unstructured":"[32] M.H. Kashani, <i>et al<\/i>.: \u201cA low-noise high-gain broadband transformer-based inverter-based transimpedance amplifier,\u201d IEEE Open J. Circuits and Syst. <b>3<\/b> (2022) 72 (DOI: 10.1109\/OJCAS.2022.3164396).","DOI":"10.1109\/OJCAS.2022.3164396"},{"key":"33","doi-asserted-by":"crossref","unstructured":"[33] S. Daneshgar, <i>et al<\/i>.: \u201cA 128Gb\/s, 11.2mW single-ended PAM4 linear TIA with 2.7\u00b5A<sub>rms<\/sub> input noise in 22nm FinFET CMOS,\u201d IEEE J. Solid-State Circuits <b>57<\/b> (2022) 1397 (DOI: 10.1109\/JSSC.2022.3147467).","DOI":"10.1109\/JSSC.2022.3147467"}],"container-title":["IEICE Electronics Express"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/20\/18\/20_20.20230339\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,9,30]],"date-time":"2023-09-30T03:22:40Z","timestamp":1696044160000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/20\/18\/20_20.20230339\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,9,25]]},"references-count":33,"journal-issue":{"issue":"18","published-print":{"date-parts":[[2023]]}},"URL":"https:\/\/doi.org\/10.1587\/elex.20.20230339","relation":{},"ISSN":["1349-2543"],"issn-type":[{"value":"1349-2543","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023,9,25]]},"article-number":"20.20230339"}}