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Shu, <i>et al<\/i>.: \u201cAn oversampling SAR ADC with DAC mismatch error shaping achieving 105dB SFDR and 101dB SNDR over 1kHz BW in 55nm CMOS,\u201d IEEE J. Solid-State Circuits <b>51<\/b> (2016) 2928 (DOI: 10.1109\/JSSC.2016.2592623).","DOI":"10.1109\/JSSC.2016.2592623"},{"key":"5","doi-asserted-by":"crossref","unstructured":"[5] K. Hasebe, <i>et al<\/i>.: \u201cA 100kHz-bandwidth 98.3dB-SNDR noise-shaping SAR ADC with improved mismatch error shaping and speed-up techniques,\u201d 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) (2022) 56 (DOI: 10.1109\/VLSITechnologyandCir46769.2022.9830166).","DOI":"10.1109\/VLSITechnologyandCir46769.2022.9830166"},{"key":"6","doi-asserted-by":"crossref","unstructured":"[6] K. Obata, <i>et al<\/i>.: \u201cA 97.99dB SNDR, 2kHz BW, 37.1\u00b5W noise-shaping SAR ADC with dynamic element matching and modulation dither effect,\u201d 2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits) (2016) 1 (DOI: 10.1109\/VLSIC.2016.7573463).","DOI":"10.1109\/VLSIC.2016.7573463"},{"key":"7","doi-asserted-by":"crossref","unstructured":"[7] Z. Chen, <i>et al<\/i>.: \u201cA 9.35-ENOB, 14.8fJ\/conv.-step fully-passive noise-shaping SAR ADC,\u201d 2015 Symposium on VLSI Circuits (VLSI Circuits) (2015) C64 (DOI: 10.1109\/VLSIC.2015.7231329).","DOI":"10.1109\/VLSIC.2015.7231329"},{"key":"8","doi-asserted-by":"crossref","unstructured":"[8] Y.-Z. Lin, <i>et al<\/i>.: \u201c20.2 A 40MHz-BW 320MS\/s passive noise-shaping SAR ADC with passive signal-residue summation in 14nm FinFET,\u201d 2019 IEEE International Solid-State Circuits Conference (ISSCC) (2019) 330 (DOI: 10.1109\/ISSCC.2019.8662299).","DOI":"10.1109\/ISSCC.2019.8662299"},{"key":"9","doi-asserted-by":"crossref","unstructured":"[9] J. Liu, <i>et al<\/i>.: \u201c27.1 A 250kHz-BW 93dB-SNDR 4th-order noise-shaping SAR using capacitor stacking and dynamic buffering,\u201d 2021 IEEE International Solid-State Circuits Conference (ISSCC) (2021) 369 (DOI: 10.1109\/ISSCC42613.2021.9366008).","DOI":"10.1109\/ISSCC42613.2021.9366008"},{"key":"10","doi-asserted-by":"crossref","unstructured":"[10] J. Shen, <i>et al<\/i>.: \u201cA 10.31 ENOB 3.125: MHz BW fully passive 2nd-order noise-shaping SAR ADC for low cost IoT sensor networks,\u201d IEICE Electron. Express <b>21<\/b> (2024) 20230122 (DOI: 10.1587\/elex.20.20230122).","DOI":"10.1587\/elex.20.20230122"},{"key":"11","doi-asserted-by":"crossref","unstructured":"[11] P. Yang and Z. Zhang: \u201cA nanowatt noise-shaping SAR ADC for passive wireless sensor node application,\u201d IEICE Electron. Express <b>19<\/b> (2022) 20220337 (DOI: 10.1587\/elex.19.20220337).","DOI":"10.1587\/elex.19.20220337"},{"key":"12","doi-asserted-by":"crossref","unstructured":"[12] M.S. Akter, <i>et al<\/i>.: \u201cA capacitively degenerated 100-dB linear 20-150MS\/s dynamic amplifier,\u201d IEEE J. Solid-State Circuits <b>53<\/b> (2018) 1115 (DOI: 10.1109\/JSSC.2017.2778277).","DOI":"10.1109\/JSSC.2017.2778277"},{"key":"13","doi-asserted-by":"crossref","unstructured":"[13] B.P. Ginsburg and A.P. Chandrakasan: \u201c500-MS\/s 5-bit ADC in 65-nm CMOS with split capacitor array DAC,\u201d IEEE J. Solid-State Circuits <b>42<\/b> (2007) 739 (DOI: 10.1109\/JSSC.2007.892169).","DOI":"10.1109\/JSSC.2007.892169"},{"key":"14","doi-asserted-by":"crossref","unstructured":"[14] M. van Elzakker, <i>et al<\/i>.: \u201cA 10-bit charge-redistribution ADC consuming 1.9\u00b5W at 1MS\/s,\u201d IEEE J. Solid-State Circuits <b>45<\/b> (2010) 1007 (DOI: 10.1109\/JSSC.2010.2043893).","DOI":"10.1109\/JSSC.2010.2043893"},{"key":"15","doi-asserted-by":"crossref","unstructured":"[15] Z. Chen, <i>et al<\/i>.: \u201cA stability-improved single-opamp third-order \u03a3\u0394 modulator by using a fully-passive noise-shaping SAR ADC and passive adder,\u201d ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference (2016) 249 (DOI: 10.1109\/ESSCIRC.2016.7598289).","DOI":"10.1109\/ESSCIRC.2016.7598289"},{"key":"16","doi-asserted-by":"crossref","unstructured":"[16] X. Tang, <i>et al<\/i>.: \u201c9.5 A 13.5b-ENOB second-order noise-shaping SAR with PVT-robust closed-loop dynamic amplifier,\u201d 2020 IEEE International Solid-State Circuits Conference (ISSCC) (2020) 162 (DOI: 10.1109\/ISSCC19947.2020.9063058).","DOI":"10.1109\/ISSCC19947.2020.9063058"},{"key":"17","doi-asserted-by":"crossref","unstructured":"[17] J. Liu, <i>et al<\/i>.: \u201c9.3 A 40kHz-BW 90dB-SNDR noise-shaping SAR with 4\u00d7 passive gain and 2nd-order mismatch error shaping,\u201d 2020 IEEE International Solid-State Circuits Conference (ISSCC) (2020) 158 (DOI: 10.1109\/ISSCC19947.2020.9063159).","DOI":"10.1109\/ISSCC19947.2020.9063159"},{"key":"18","doi-asserted-by":"crossref","unstructured":"[18] C.-C. Liu and M.-C. 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Jie, <i>et al<\/i>.: \u201c9.4 A 4th-order cascaded-noise-shaping SAR ADC with 88dB SNDR over 100kHz bandwidth,\u201d 2020 IEEE International Solid-State Circuits Conference (ISSCC) (2020) 160 (DOI: 10.1109\/ISSCC19947.2020.9062905).","DOI":"10.1109\/ISSCC19947.2020.9062905"},{"key":"21","doi-asserted-by":"crossref","unstructured":"[21] B. Malki, <i>et al<\/i>: \u201cA complementary dynamic residue amplifier for a 67dB SNDR 1.36mW 170MS\/s pipelined SAR ADC,\u201d ESSCIRC 2014-40th European Solid State Circuits Conference (ESSCIRC) (2014) 215 (DOI: 10.1109\/ESSCIRC.2014.6942060).","DOI":"10.1109\/ESSCIRC.2014.6942060"},{"key":"22","doi-asserted-by":"crossref","unstructured":"[22] J.S. Yoon, <i>et al<\/i>.: \u201cA 74-dB dynamic-range 625-kHz bandwidth second-order noise-shaping SAR ADC utilizing a temperature-compensated dynamic amplifier and a digital mismatch calibration,\u201d IEEE Access <b>9<\/b> (2021) 39597 (DOI: 10.1109\/ACCESS.2021.3063680).","DOI":"10.1109\/ACCESS.2021.3063680"},{"key":"23","doi-asserted-by":"crossref","unstructured":"[23] W. Guo and N. Sun: \u201cA 12b-ENOB 61\u00b5W noise-shaping SAR ADC with a passive integrator,\u201d ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference (2016) 405 (DOI: 10.1109\/ESSCIRC.2016.7598327).","DOI":"10.1109\/ESSCIRC.2016.7598327"},{"key":"24","doi-asserted-by":"crossref","unstructured":"[24] Y. Yang, <i>et al<\/i>.: \u201cAn optimized fully-passive noise-shaping SAR ADC with integration capacitor reuse technique,\u201d IEICE Electron. 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Solid-State Circuits <b>45<\/b> (2010) 731 (DOI: 10.1109\/JSSC.2010.2042254).","DOI":"10.1109\/JSSC.2010.2042254"},{"key":"28","doi-asserted-by":"crossref","unstructured":"[28] M. Lin, <i>et al<\/i>.: \u201cA 15.5dB, wide signal swing, dynamic amplifier using a common-mode voltage detection technique,\u201d 2011 IEEE International Symposium of Circuits and Systems (ISCAS) (2011) 21 (DOI: 10.1109\/ISCAS.2011.5937491).","DOI":"10.1109\/ISCAS.2011.5937491"},{"key":"29","doi-asserted-by":"crossref","unstructured":"[29] M. Miyahara and A. Matsuzawa: \u201cAn 84dB dynamic range 62.5-625kHz bandwidth clock-scalable noise-shaping SAR ADC with open-loop integrator using dynamic amplifier,\u201d 2017 IEEE Custom Integrated Circuits Conference (CICC) (2017) 1 (DOI: 10.1109\/CICC.2017.7993655).","DOI":"10.1109\/CICC.2017.7993655"},{"key":"30","doi-asserted-by":"crossref","unstructured":"[30] D.-H. Lee and T.-H. Kuo: \u201cAdvancing data weighted averaging technique for multi-bit sigma-delta modulators,\u201d IEEE Trans. Circuits Syst. II, Exp. Briefs <b>54<\/b>(2007) 838 (DOI: 10.1109\/TCSII.2007.901575).","DOI":"10.1109\/TCSII.2007.901575"},{"key":"31","doi-asserted-by":"crossref","unstructured":"[31] J. Liu, <i>et al<\/i>.: \u201cError-feedback mismatch error shaping for high-resolution data converters,\u201d IEEE Trans. Circuits. Syst. I, Reg. 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