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Koga, <i>et al<\/i>.: \u201cTechniques of microprocessor testing and SEU-rate prediction,\u201d IEEE Trans. Nucl. Sci. <b>32<\/b> (1985) 4219 (DOI: 10.1109\/TNS.1985.4334098).","DOI":"10.1109\/TNS.1985.4334098"},{"key":"2","doi-asserted-by":"crossref","unstructured":"[2] R. Harboe-Sorensen, <i>et al<\/i>.: \u201cThe SEU risk assessment of Z80A, 8086 and 80C86 microprocessors intended for use in a low altitude polar orbit,\u201d IEEE Trans. Nucl. Sci. <b>33<\/b> (1986) 1626 (DOI: 10.1109\/TNS.1986.4334653).","DOI":"10.1109\/TNS.1986.4334653"},{"key":"3","doi-asserted-by":"crossref","unstructured":"[3] S. Buchner, <i>et al<\/i>.: \u201cComparison of error rates in combinational and sequential logic,\u201d IEEE Trans. Nucl. Sci. <b>44<\/b> (1997) 2209 (DOI: 10.1109\/23.659037).","DOI":"10.1109\/23.659037"},{"key":"4","doi-asserted-by":"crossref","unstructured":"[4] B. Narasimham, <i>et al<\/i>.: \u201cOn-chip characterization of single-event transient pulsewidths,\u201d IEEE Trans. Device Mater. Rel. <b>6<\/b> (2006) 542 (DOI: 10.1109\/TDMR.2006.885589).","DOI":"10.1109\/TDMR.2006.885589"},{"key":"5","doi-asserted-by":"crossref","unstructured":"[5] V. Ferlet-Cavrois, <i>et al<\/i>.: \u201cSingle event transients in digital CMOS--a review,\u201d IEEE Trans. Nucl. Sci. <b>60<\/b> (2013) 1767 (DOI: 10.1109\/TNS.2013.2255624).","DOI":"10.1109\/TNS.2013.2255624"},{"key":"6","doi-asserted-by":"crossref","unstructured":"[6] N.N. Mahatme, <i>et al<\/i>.: \u201cComparison of combinational and sequential error rates for a deep submicron process,\u201d IEEE Trans. Nucl. Sci. <b>58<\/b> (2011) 2719 (DOI: 10.1109\/TNS.2011.2171993).","DOI":"10.1109\/TNS.2011.2171993"},{"key":"7","doi-asserted-by":"crossref","unstructured":"[7] A. Balasubramanian, <i>et al<\/i>.: \u201cRHBD techniques for mitigating effects of single-event hits using guard-gates,\u201d IEEE Trans. Nucl. Sci. <b>52<\/b> (2005) 2531 (DOI: 10.1109\/TNS.2005.860719).","DOI":"10.1109\/TNS.2005.860719"},{"key":"8","doi-asserted-by":"crossref","unstructured":"[8] R. Nakajima, <i>et al<\/i>.: \u201cSoft-error tolerance by guard-gate structures on flip-flops in 22 and 65nm FD-SOI technologies,\u201d IEICE Trans. Electron <b>E107-C<\/b> (2024) 191 (DOI: 10.1587\/transele.2023CDP0004).","DOI":"10.1587\/transele.2023CDP0004"},{"key":"9","doi-asserted-by":"crossref","unstructured":"[9] A.C.-C. Chang, <i>et al<\/i>.: \u201cCASSER: a closed-form analysis framework for statistical soft error rate,\u201d IEEE Trans. Very Large Scale Integr. (VLSI) Syst. <b>21<\/b> (2013) 1837 (DOI: 10.1109\/TVLSI.2012.2220386).","DOI":"10.1109\/TVLSI.2012.2220386"},{"key":"10","unstructured":"[10] B. Zhang, <i>et al<\/i>.: \u201cFASER: fast analysis of soft error susceptibility for cell-based designs,\u201d Proc. ISQED\u201906 (2006) 755 (DOI: 10.1109\/ISQED.2006.64)."},{"key":"11","doi-asserted-by":"crossref","unstructured":"[11] N. Miskov-Zivanov and D. Marculescu: \u201cMARS-C: modeling and reduction of soft errors in combinational circuits,\u201d Proc. Design Autom. Conf. (2006) 767 (DOI: 10.1145\/1146909.1147104).","DOI":"10.1145\/1146909.1147104"},{"key":"12","doi-asserted-by":"crossref","unstructured":"[12] M. Zhang and N.R. Shanbhag: \u201cSoft-error-rate-analysis (SERA) methodology,\u201d IEEE Trans. Comput.-Aided Design <b>25<\/b> (2006) 2140 (DOI: 10.1109\/ICCAD.2004.1382553).","DOI":"10.1109\/TCAD.2005.862738"},{"key":"13","doi-asserted-by":"crossref","unstructured":"[13] S. Kwon, <i>et al<\/i>.: \u201cAn approximated soft error analysis technique for gate-level designs,\u201d IEICE Electron. Express <b>11<\/b> (2014) 20140224 (DOI: 10.1587\/elex.11.20140224).","DOI":"10.1587\/elex.11.20140224"},{"key":"14","doi-asserted-by":"crossref","unstructured":"[14] V. Ferlet-Cavrois, <i>et al<\/i>.: \u201cNew insights into single event transient propagation in chains of inverters--evidence for propagation-induced pulse broadening,\u201d IEEE Trans. Nucl. Sci. <b>54<\/b> (2007) 2338 (DOI: 10.1109\/TNS.2007.910202).","DOI":"10.1109\/TNS.2007.910202"},{"key":"15","doi-asserted-by":"crossref","unstructured":"[15] V. Ferlet-Cavrois, <i>et al<\/i>.: \u201cInvestigation of the propagation induced pulse broadening (PIPB) effect on single event transients in SOI and bulk inverter chains,\u201d IEEE Trans. Nucl. Sci. <b>55<\/b> (2008) 2842 (DOI: 10.1109\/TNS.2008.2007724).","DOI":"10.1109\/TNS.2008.2007724"},{"key":"16","doi-asserted-by":"crossref","unstructured":"[16] M.J. Gadlage, <i>et al<\/i>.: \u201cEffect of voltage fluctuations on the single event transient response of deep submicron digital circuits,\u201d IEEE Trans. Nucl. Sci. <b>54<\/b> (2007) 2495 (DOI: 10.1109\/TNS.2007.907433).","DOI":"10.1109\/TNS.2007.907433"},{"key":"17","doi-asserted-by":"crossref","unstructured":"[17] P. Dudek, <i>et al<\/i>.: \u201cA high-resolution CMOS time-to-digital converter utilizing a vernier delay line,\u201d IEEE J. Solid-State Circuits <b>35<\/b> (2000) 240 (DOI: 10.1109\/4.823449).","DOI":"10.1109\/4.823449"},{"key":"18","doi-asserted-by":"crossref","unstructured":"[18] P. Eaton, <i>et al<\/i>.: \u201cSingle event transient pulsewidth measurements using a variable temporal latch technique,\u201d IEEE Trans. Nucl. Sci. <b>51<\/b> (2004) 3365 (DOI: 10.1109\/TNS.2004.840020).","DOI":"10.1109\/TNS.2004.840020"},{"key":"19","doi-asserted-by":"crossref","unstructured":"[19] S. Jagannathan, <i>et al<\/i>.: \u201cIndependent measurement of SET pulse widths from N-hits and P-hits in 65-nm CMOS,\u201d IEEE Trans. Nucl. Sci. <b>57<\/b> (2010) 3386 (DOI: 10.1109\/TNS.2010.2076836).","DOI":"10.1109\/TNS.2010.2076836"},{"key":"20","doi-asserted-by":"crossref","unstructured":"[20] A. Evans, <i>et al<\/i>.: \u201cNew techniques for SET sensitivity and propagation measurement in flash-based FPGAs,\u201d IEEE Trans. Nucl. Sci. <b>61<\/b> (2014) 3171 (DOI: 10.1109\/TNS.2014.2365410).","DOI":"10.1109\/TNS.2014.2365410"},{"key":"21","doi-asserted-by":"crossref","unstructured":"[21] L.W. Massengill and P.W. Tuinenga: \u201cSingle-event transient pulse propagation in digital CMOS,\u201d IEEE Trans. Nucl. Sci. <b>55<\/b> (2008) 2861 (DOI: 10.1109\/TNS.2008.2006749).","DOI":"10.1109\/TNS.2008.2006749"},{"key":"22","doi-asserted-by":"crossref","unstructured":"[22] S. Rezgui, <i>et al<\/i>.: \u201cConfiguration and routing effects on the SET propagation in flash-based FPGAs,\u201d IEEE Trans. Nucl. Sci. <b>55<\/b> (2008) 3328 (DOI: 10.1109\/TNS.2008.2007726).","DOI":"10.1109\/TNS.2008.2007726"},{"key":"23","doi-asserted-by":"crossref","unstructured":"[23] L. Sterpone, <i>et al<\/i>.: \u201cAnalysis of SET propagation in flash-based FPGAs by means of electrical pulse injection,\u201d IEEE Trans. Nucl. Sci. <b>57<\/b> (2010) 1820 (DOI: 10.1109\/TNS.2010.2043686).","DOI":"10.1109\/TNS.2010.2043686"},{"key":"24","doi-asserted-by":"crossref","unstructured":"[24] R. Harada, <i>et al<\/i>.: \u201cImpact of NBTI-induced pulse-width modulation on SET pulse-width measurement,\u201d IEEE Trans. Nucl. Sci. <b>60<\/b> (2013) 2630 (DOI: 10.1109\/TNS.2012.2232680).","DOI":"10.1109\/TNS.2012.2232680"},{"key":"25","doi-asserted-by":"crossref","unstructured":"[25] G. Bany Hamad, <i>et al<\/i>.: \u201cNew insights into the single event transient propagation through static and TSPC logic,\u201d IEEE Trans. Nucl. Sci. <b>61<\/b> (2014) 1618 (DOI: 10.1109\/TNS.2014.2305434).","DOI":"10.1109\/TNS.2014.2305434"},{"key":"26","doi-asserted-by":"crossref","unstructured":"[26] H. Liang, <i>et al<\/i>.: \u201cA methodology for characterization of SET propagation in SRAM-based FPGAs,\u201d IEEE Trans. Nucl. Sci. <b>63<\/b> (2016) 2985 (DOI: 10.1109\/TNS.2016.2620165).","DOI":"10.1109\/TNS.2016.2620165"},{"key":"27","doi-asserted-by":"crossref","unstructured":"[27] J.S. Melinger, <i>et al<\/i>.: \u201cCritical evaluation of the pulsed laser method for single event effects testing and fundamental studies,\u201d IEEE Trans. Nucl. Sci. <b>41<\/b> (1994) 2574 (DOI: 10.1109\/23.340618).","DOI":"10.1109\/23.340618"},{"key":"28","doi-asserted-by":"crossref","unstructured":"[28] D. McMorrow, <i>et al<\/i>.: \u201cSubbandgap laser-induced single event effects: carrier generation via two-photon absorption,\u201d IEEE Trans. Nucl. Sci. <b>49<\/b> (2002) 3002 (DOI: 10.1109\/TNS.2002.805337).","DOI":"10.1109\/TNS.2002.805337"},{"key":"29","doi-asserted-by":"crossref","unstructured":"[29] D. McMorrow, <i>et al<\/i>.: \u201cThree-dimensional mapping of single-event effects using two photon absorption,\u201d IEEE Trans. Nucl. Sci. <b>50<\/b> (2003) 2199 (DOI: 10.1109\/TNS.2003.820742).","DOI":"10.1109\/TNS.2003.820742"},{"key":"30","unstructured":"[30] D. Alexandrescu, <i>et al<\/i>.: \u201cNew methods for evaluating the impact of single event transients in VDSM ICs,\u201d Proc. 17th IEEE Int. Symp. Defect Fault-Tolerance in VLSI Systems (2002) 99 (DOI: 10.1109\/DFTVS.2002.1173506)."},{"key":"31","doi-asserted-by":"crossref","unstructured":"[31] Q. Heather and W. Michael: \u201cValidation techniques for fault emulation of SRAM-based FPGAs,\u201d IEEE Trans. Nucl. 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