{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,15]],"date-time":"2025-11-15T03:29:40Z","timestamp":1763177380777,"version":"3.45.0"},"reference-count":33,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"21","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Electron. Express"],"published-print":{"date-parts":[[2025,11,10]]},"DOI":"10.1587\/elex.22.20250517","type":"journal-article","created":{"date-parts":[[2025,9,16]],"date-time":"2025-09-16T22:07:54Z","timestamp":1758060474000},"page":"20250517-20250517","source":"Crossref","is-referenced-by-count":0,"title":["Fast-switching and latch-up immunity double-gate SOI lateral IGBT with P-pillar layer"],"prefix":"10.1587","volume":"22","author":[{"given":"Chunzao","family":"Wang","sequence":"first","affiliation":[{"name":"School of Additive Manufacturing, Zhejiang Polytechnic University of Mechanical and Electrical Engineering"}]},{"given":"Tao","family":"Wu","sequence":"additional","affiliation":[{"name":"School of Additive Manufacturing, Zhejiang Polytechnic University of Mechanical and Electrical Engineering"}]},{"given":"Wenfeng","family":"Chen","sequence":"additional","affiliation":[{"name":"School of Additive Manufacturing, Zhejiang Polytechnic University of Mechanical and Electrical Engineering"}]},{"given":"Yunchuan","family":"Xu","sequence":"additional","affiliation":[{"name":"School of Information Engineering, Quzhou College of Technology"}]}],"member":"532","reference":[{"key":"1","doi-asserted-by":"crossref","unstructured":"[1] D. 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Sun, <i>et al<\/i>.: \u201cFast-switching lateral IGBT with trench\/planar gate and integrated schottky barrier diode (SBD),\u201d ISPSD (2019) 379 (DOI: 10.1109\/ISPSD.2019.8757596).","DOI":"10.1109\/ISPSD.2019.8757596"}],"container-title":["IEICE Electronics Express"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/22\/21\/22_22.20250517\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,11,15]],"date-time":"2025-11-15T03:24:52Z","timestamp":1763177092000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/elex\/22\/21\/22_22.20250517\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,11,10]]},"references-count":33,"journal-issue":{"issue":"21","published-print":{"date-parts":[[2025]]}},"URL":"https:\/\/doi.org\/10.1587\/elex.22.20250517","relation":{},"ISSN":["1349-2543"],"issn-type":[{"type":"electronic","value":"1349-2543"}],"subject":[],"published":{"date-parts":[[2025,11,10]]},"article-number":"22.20250517"}}