{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,11,6]],"date-time":"2022-11-06T04:54:51Z","timestamp":1667710491393},"reference-count":33,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"11","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Trans. Electron."],"published-print":{"date-parts":[[2022,11,1]]},"DOI":"10.1587\/transele.2021ecp5061","type":"journal-article","created":{"date-parts":[[2022,4,17]],"date-time":"2022-04-17T22:09:01Z","timestamp":1650233341000},"page":"704-711","source":"Crossref","is-referenced-by-count":0,"title":["Process Variation Based Electrical Model of STT-Assisted VCMA-MTJ and Its Application in NV-FA"],"prefix":"10.1587","volume":"E105.C","author":[{"given":"Dongyue","family":"JIN","sequence":"first","affiliation":[{"name":"Faculty of Information Technology, Beijing University of Technology"}]},{"given":"Luming","family":"CAO","sequence":"additional","affiliation":[{"name":"Faculty of Information Technology, Beijing University of Technology"}]},{"given":"You","family":"WANG","sequence":"additional","affiliation":[{"name":"Faulty of Hefei Innovation Research Institute, Beihang University"}]},{"given":"Xiaoxue","family":"JIA","sequence":"additional","affiliation":[{"name":"Faculty of Information Technology, Beijing University of Technology"}]},{"given":"Yongan","family":"PAN","sequence":"additional","affiliation":[{"name":"Faculty of Information Technology, Beijing University of Technology"}]},{"given":"Yuxin","family":"ZHOU","sequence":"additional","affiliation":[{"name":"Faculty of Information Technology, Beijing University of Technology"}]},{"given":"Xin","family":"LEI","sequence":"additional","affiliation":[{"name":"Faculty of Information Technology, Beijing University of Technology"}]},{"given":"Yuanyuan","family":"LIU","sequence":"additional","affiliation":[{"name":"Faculty of Information Technology, Beijing University of Technology"}]},{"given":"Yingqi","family":"YANG","sequence":"additional","affiliation":[{"name":"Faculty of Information Technology, Beijing University of Technology"}]},{"given":"Wanrong","family":"ZHANG","sequence":"additional","affiliation":[{"name":"Faculty of Information Technology, Beijing University of Technology"}]}],"member":"532","reference":[{"key":"1","doi-asserted-by":"crossref","unstructured":"[1] E. Deng, Y. Wang, Z. Wang, J.-O. Klein, B. Dieny, G. Prenat, and W.S. Zhao, \u201cRobust magnetic full-adder with voltage sensing 2T\/2MTJ cell,\u201d Proc. 2015 IEEE\/ACM Int. Symp. Nanoscale Archit., Boston, USA, pp.27-32, July 2015. DOI: 10.1109\/NANOARCH.2015.7180582. 10.1109\/nanoarch.2015.7180582","DOI":"10.1109\/NANOARCH.2015.7180582"},{"key":"2","doi-asserted-by":"crossref","unstructured":"[2] G. Verma, \u201cDesign and analysis of ALU for low power IOT centric processor architectures,\u201d 2020 Glob. Conf. Wirel. Opt. Technol., Malaga, Spain, Oct. 2020. DOI: 10.1109\/GCWOT49901.2020. 9391609. 10.1109\/gcwot49901.2020.9391609","DOI":"10.1109\/GCWOT49901.2020.9391609"},{"key":"3","doi-asserted-by":"publisher","unstructured":"[3] E. Deng, Y. Zhang, J.-O. Klein, D. Ravelsona, C. Chappert, and W. Zhao, \u201cLow power magnetic full-adder based on spin transfer torque MRAM,\u201d IEEE Trans. Magn., vol.49, no.3, pp.4982-4987, 2013. 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DOI: 10.1109\/TNANO.2015.2415524. 10.1109\/tnano.2015.2415524","DOI":"10.1109\/TNANO.2015.2415524"}],"container-title":["IEICE Transactions on Electronics"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/transele\/E105.C\/11\/E105.C_2021ECP5061\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,11,5]],"date-time":"2022-11-05T03:36:18Z","timestamp":1667619378000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/transele\/E105.C\/11\/E105.C_2021ECP5061\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,11,1]]},"references-count":33,"journal-issue":{"issue":"11","published-print":{"date-parts":[[2022]]}},"URL":"https:\/\/doi.org\/10.1587\/transele.2021ecp5061","relation":{},"ISSN":["0916-8524","1745-1353"],"issn-type":[{"value":"0916-8524","type":"print"},{"value":"1745-1353","type":"electronic"}],"subject":[],"published":{"date-parts":[[2022,11,1]]},"article-number":"2021ECP5061"}}