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McDaniel, \u201cEnsemble adversarial training: Attacks and defenses,\u201d arXiv preprint arXiv:1705.07204, 2017."},{"key":"5","doi-asserted-by":"publisher","unstructured":"[5] M. Osadchy, J. Hernandez-Castro, S. Gibson, O. Dunkelman, and D. Prez-Cabo, \u201cNo bot expects the deepcaptcha! Introducing immutable adversarial examples, with applications to captcha generation,\u201d IEEE Trans. Inf. Forensics Security, vol.12, no.11, pp.2640-2653, 2017. 10.1109\/tifs.2017.2718479","DOI":"10.1109\/TIFS.2017.2718479"},{"key":"6","unstructured":"[6] S. Gu and L. Rigazio, \u201cTowards deep neural network architectures robust to adversarial examples,\u201d arXiv preprint arXiv:1412.5068, 2014."},{"key":"7","doi-asserted-by":"publisher","unstructured":"[7] D. Boneh, R.A. DeMillo, and R.J. Lipton, \u201cOn the importance of checking cryptographic protocols for faults,\u201d Advances in Cryptology \u2014 EUROCRYPT&apos;97, W. Fumy, ed., Berlin, Heidelberg, pp.37-51, Springer Berlin Heidelberg, 1997. 10.1007\/3-540-69053-0_4","DOI":"10.1007\/3-540-69053-0_4"},{"key":"8","doi-asserted-by":"publisher","unstructured":"[8] E. Biham and A. Shamir, \u201cDifferential fault analysis of secret key cryptosystems,\u201d Annual International Cryptology Conference, pp.513-525, Springer, 1997. 10.1007\/bfb0052259","DOI":"10.1007\/BFb0052259"},{"key":"9","doi-asserted-by":"crossref","unstructured":"[9] A.S. Rakin, Z. He, and D. Fan, \u201cBit-flip attack: Crushing neural network with progressive bit search,\u201d 2019 IEEE\/CVF International Conference on Computer Vision (ICCV), pp.1211-1220, Oct. 2019. 10.1109\/iccv.2019.00130","DOI":"10.1109\/ICCV.2019.00130"},{"key":"10","doi-asserted-by":"crossref","unstructured":"[10] P. Zhao, S. Wang, C. Gongye, Y. Wang, Y. Fei, and X. Lin, \u201cFault sneaking attack: A stealthy framework for misleading deep neural networks,\u201d 2019 56th ACM\/IEEE Design Automation Conference (DAC), pp.1-6, 2019. 10.1145\/3316781.3317825","DOI":"10.1145\/3316781.3317825"},{"key":"11","unstructured":"[11] S. Hong, P. Frigo, Y. Kaya, C. Giuffrida, and T. Dumitra\u015f, \u201cTerminal brain damage: Exposing the graceless degradation in deep neural networks under hardware fault attacks,\u201d Proc. 28th USENIX Conference on Security Symposium, SEC&apos;19, USA, p.497514, USENIX Association, 2019."},{"key":"12","doi-asserted-by":"crossref","unstructured":"[12] J. Breier, X. Hou, D. Jap, L. Ma, S. Bhasin, and Y. Liu, \u201cPractical fault attack on deep neural networks,\u201d Proc. 2018 ACM SIGSAC Conference on Computer and Communications Security, pp.2204-2206, 2018. 10.1145\/3243734.3278519","DOI":"10.1145\/3243734.3278519"},{"key":"13","unstructured":"[13] Xilinx, \u201cDPU for Convolutional Neural Network v1.2.\u201d"},{"key":"14","doi-asserted-by":"crossref","unstructured":"[14] W. Liu, C.H. Chang, F. Zhang, and X. Lou, \u201cImperceptible misclassification attack on deep learning accelerator by glitch injection,\u201d 2020 57th ACM\/IEEE Design Automation Conference (DAC), pp.1-6, 2020. 10.1109\/dac18072.2020.9218577","DOI":"10.1109\/DAC18072.2020.9218577"},{"key":"15","unstructured":"[15] L. Batina, S. Bhasin, D. Jap, and S. Picek, \u201cCSI neural network: Using side-channels to recover your artificial neural network information,\u201d Cryptology ePrint Archive, Report 2018\/477, 2018. https:\/\/eprint.iacr.org\/2018\/477"},{"key":"16","doi-asserted-by":"crossref","unstructured":"[16] T. Fukunaga and J. Takahashi, \u201cPractical fault attack on a cryptographic LSI with ISO\/IEC 18033-3 block ciphers,\u201d 2009 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC), pp.84-92, 2009. 10.1109\/fdtc.2009.34","DOI":"10.1109\/FDTC.2009.34"},{"key":"17","doi-asserted-by":"crossref","unstructured":"[17] J. Balasch, B. Gierlichs, and I. Verbauwhede, \u201cAn in-depth and black-box characterization of the effects of clock glitches on 8-bit MCUs,\u201d 2011 Workshop on Fault Diagnosis and Tolerance in Cryptography, pp.105-114, 2011. 10.1109\/fdtc.2011.9","DOI":"10.1109\/FDTC.2011.9"},{"key":"18","doi-asserted-by":"crossref","unstructured":"[18] T. Korak and M. Hoefler, \u201cOn the effects of clock and power supply tampering on two microcontroller platforms,\u201d 2014 Workshop on Fault Diagnosis and Tolerance in Cryptography, pp.8-17, 2014. 10.1109\/fdtc.2014.11","DOI":"10.1109\/FDTC.2014.11"},{"key":"19","doi-asserted-by":"crossref","unstructured":"[19] A. Beckers, J. Balasch, B. Gierlichs, and I. Verbauwhede, \u201cDesign and implementation of a waveform-matching based triggering system,\u201d Constructive Side-Channel Analysis and Secure Design, F.X. Standaert and E. Oswald, eds., Cham, pp.184-198, Springer International Publishing, 2016. 10.1007\/978-3-319-43283-0_11","DOI":"10.1007\/978-3-319-43283-0_11"},{"key":"20","doi-asserted-by":"crossref","unstructured":"[20] C. Clavier, J.S. Coron, and N. Dabbous, \u201cDifferential power analysis in the presence of hardware countermeasures,\u201d Cryptographic Hardware and Embedded Systems \u2014 CHES 2000, \u00c7.K. Ko\u00e7 and C. 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