{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,2]],"date-time":"2022-04-02T14:47:57Z","timestamp":1648910877506},"reference-count":30,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"3","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Trans. Fundamentals"],"published-print":{"date-parts":[[2022,3,1]]},"DOI":"10.1587\/transfun.2021vlp0006","type":"journal-article","created":{"date-parts":[[2021,8,30]],"date-time":"2021-08-30T22:09:30Z","timestamp":1630361370000},"page":"497-508","source":"Crossref","is-referenced-by-count":0,"title":["Activation-Aware Slack Assignment Based Mode-Wise Voltage Scaling for Energy Minimization"],"prefix":"10.1587","volume":"E105.A","author":[{"given":"TaiYu","family":"CHENG","sequence":"first","affiliation":[{"name":"Department of Information Systems Engineering, Graduate School of Information Science and Technology, Osaka University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yutaka","family":"MASUDA","sequence":"additional","affiliation":[{"name":"Center for Embedded Computing Systems, Graduate School of Informatics, Nagoya University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jun","family":"NAGAYAMA","sequence":"additional","affiliation":[{"name":"Socionext Inc."}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yoichi","family":"MOMIYAMA","sequence":"additional","affiliation":[{"name":"Socionext Inc."}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jun","family":"CHEN","sequence":"additional","affiliation":[{"name":"Department of Information Systems Engineering, Graduate School of Information Science and Technology, Osaka University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Masanori","family":"HASHIMOTO","sequence":"additional","affiliation":[{"name":"Department of Information Systems Engineering, Graduate School of Information Science and Technology, Osaka University"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"532","reference":[{"key":"1","doi-asserted-by":"publisher","unstructured":"[1] K. Shafique, B.A. Khawaja, F. Sabir, S. Qazi, and M. Mustaqim, \u201cInternet of things (IoT) for next-generation smart systems: A review of current challenges, future trends and prospects for emerging 5G-IoT scenarios,\u201d IEEE Access, vol.8, pp.23022-23040, 2020. 10.1109\/access.2020.2970118","DOI":"10.1109\/ACCESS.2020.2970118"},{"key":"2","doi-asserted-by":"crossref","unstructured":"[2] A. Dunkels, J. Eriksson, N. Finne, F. \u00d6sterlind, N. Tsiftes, J. Abeill\u00e9, and M. Durvy, \u201cLow-power IPv6 for the internet of things,\u201d 2012 Ninth International Conference on Networked Sensing (INSS), pp.1-6, 2012. 10.1109\/inss.2012.6240537","DOI":"10.1109\/INSS.2012.6240537"},{"key":"3","doi-asserted-by":"crossref","unstructured":"[3] M. Magno, L. Benini, C. Spagnol, and E. Popovici, \u201cWearable low power dry surface wireless sensor node for healthcare monitoring application,\u201d 2013 IEEE 9th International Conference on Wireless and Mobile Computing, Networking and Communications (WiMob), pp.189-195, 2013. 10.1109\/wimob.2013.6673360","DOI":"10.1109\/WiMOB.2013.6673360"},{"key":"4","unstructured":"[4] R. Yu and T. Watteyne, \u201cReliable, low power wireless sensor networks for the internet of things: Making wireless sensors as accessible as web servers,\u201d Linear Technology, Dec. 2013."},{"key":"5","unstructured":"[5] P. Pawar, R. Nielsen, N. Prasad, S. Ohmori, and R. Prasad, \u201cHybrid mechanisms: Towards an efficient wireless sensor network medium access control,\u201d 2011 The 14th International Symposium on Wireless Personal Multimedia Communications (WPMC), pp.1-5, 2011."},{"key":"6","unstructured":"[6] J. Nagayama, Y. Masuda, M. Takeshige, Y. Ogawa, M. Hashimoto, and Y. Momiyama, \u201cActivation-aware slack assignment (ASA) for mode-wise power saving in high-end ISP,\u201d ACM\/IEEE DAC Designer\/IP track, 2019."},{"key":"7","doi-asserted-by":"publisher","unstructured":"[7] K. Lee, S.-J. Lee, and H.-J. Yoo, \u201cLow-power network-on-chip for high-performance SoC design,\u201d IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol.14, no.2, pp.148-160, 2006. 10.1109\/tvlsi.2005.863753","DOI":"10.1109\/TVLSI.2005.863753"},{"key":"8","doi-asserted-by":"publisher","unstructured":"[8] S. Das, D. Roberts, S. Lee, S. Pant, D. Blaauw, T. Austin, K. Flautner, and T. Mudge, \u201cA self-tuning dvs processor using delay-error detection and correction,\u201d IEEE J. Solid-State Circuits, vol.41, no.4, pp.792-804, 2006. 10.1109\/jssc.2006.870912","DOI":"10.1109\/JSSC.2006.870912"},{"key":"9","doi-asserted-by":"publisher","unstructured":"[9] U. Jinbo, J. Yamada, R. Shioya, and M. Goshima, \u201cApplying razor flip-flops to sram read circuits,\u201d IEICE Trans. Electron., vol.E100-C, no.3, pp.245-258, 2017. 10.1587\/transele.e100.c.245","DOI":"10.1587\/transele.E100.C.245"},{"key":"10","doi-asserted-by":"crossref","unstructured":"[10] J. Park and J.A. Abraham, \u201cA fast, accurate and simple critical path monitor for improving energy-delay product in dvs systems,\u201d IEEE\/ACM International Symposium on Low Power Electronics and Design, pp.391-396, 2011. 10.1109\/islped.2011.5993672","DOI":"10.1109\/ISLPED.2011.5993672"},{"key":"11","doi-asserted-by":"crossref","unstructured":"[11] A. Drake, R. Senger, H. Deogun, G. Carpenter, S. Ghiasi, T. Nguyen, N. James, M. Floyd, and V. Pokala, \u201cA distributed critical-path timing monitor for a 65nm high-performance microprocessor,\u201d 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, pp.398-399, 2007. 10.1109\/isscc.2007.373462","DOI":"10.1109\/ISSCC.2007.373462"},{"key":"12","doi-asserted-by":"crossref","unstructured":"[12] Y. Kunitake, T. Sato, and H. Yasuura, \u201cA replacement strategy for canary flip-flops,\u201d 2010 IEEE 16th Pacific Rim International Symposium on Dependable Computing, pp.227-228, 2010. 10.1109\/prdc.2010.46","DOI":"10.1109\/PRDC.2010.46"},{"key":"13","doi-asserted-by":"crossref","unstructured":"[13] Y. Kunitake, T. Sato, H. Yasuura, and T. Hayashida, \u201cPossibilities to miss predicting timing errors in canary flip-flops,\u201d 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS), pp.1-4, 2011. 10.1109\/mwscas.2011.6026656","DOI":"10.1109\/MWSCAS.2011.6026656"},{"key":"14","doi-asserted-by":"publisher","unstructured":"[14] Y. Masuda and M. Hashimoto, \u201cMTTF-aware design methodology of adaptively voltage scaled circuit with timing error predictive flip-flop,\u201d IEICE Trans. Fundamentals, vol.E102-A, no.7, pp.867-877, July 2019. 10.1587\/transfun.e102.a.867","DOI":"10.1587\/transfun.E102.A.867"},{"key":"15","doi-asserted-by":"crossref","unstructured":"[15] Y. Masuda, M. Hashimoto, and T. Onoye, \u201cCritical path isolation for time-to-failure extension and lower voltage operation,\u201d 2016 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD), pp.1-8, 2016. 10.1145\/2966986.2967019","DOI":"10.1145\/2966986.2967019"},{"key":"16","doi-asserted-by":"publisher","unstructured":"[16] Y. Masuda, T. Onoye, and M. Hashimoto, \u201cActivation-aware slack assignment for time-to-failure extension and power saving,\u201d IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol.26, no.11, pp.2217-2229, 2018. 10.1109\/tvlsi.2018.2862154","DOI":"10.1109\/TVLSI.2018.2862154"},{"key":"17","doi-asserted-by":"crossref","unstructured":"[17] Y. Masuda, J. Nagayama, T. Cheng, T. Ishihara, Y. Momiyama, and M. Hashimoto, \u201cCritical path isolation and bit-width scaling are highly compatible for voltage over-scalable design,\u201d 2021 Design, Automation and Test in Europe Conference (DATE), pp.1260-1265, 2021. 10.23919\/date51398.2021.9473946","DOI":"10.23919\/DATE51398.2021.9473946"},{"key":"18","doi-asserted-by":"publisher","unstructured":"[18] S. Ghosh, S. Bhunia, and K. Roy, \u201cCrista: A new paradigm for low-power, variation-tolerant, and adaptive circuit synthesis using critical path isolation,\u201d IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol.26, no.11, pp.1947-1956, 2007. 10.1109\/tcad.2007.896305","DOI":"10.1109\/TCAD.2007.896305"},{"key":"19","doi-asserted-by":"crossref","unstructured":"[19] A.B. Kahng, S. Kang, R. Kumar, and J. Sartori, \u201cSlack redistribution for graceful degradation under voltage overscaling,\u201d 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC), pp.825-831, 2010. 10.1109\/aspdac.2010.5419691","DOI":"10.1109\/ASPDAC.2010.5419691"},{"key":"20","doi-asserted-by":"crossref","unstructured":"[20] A.B. Ahmed, D. Fujiki, H. Matsutani, M. Koibuchi, and H. Amano, \u201cAxNoC: Low-power approximate network-on-chips using critical-path isolation,\u201d 2018 Twelfth IEEE\/ACM International Symposium on Networks-on-Chip (NOCS), pp.1-8, 2018. 10.1109\/nocs.2018.8512158","DOI":"10.1109\/NOCS.2018.8512158"},{"key":"21","doi-asserted-by":"crossref","unstructured":"[21] K. Roy and A. Raghunathan, \u201cApproximate computing: An energy-efficient computing technique for error resilient applications,\u201d 2015 IEEE Computer Society Annual Symposium on VLSI, pp.473-475, 2015. 10.1109\/isvlsi.2015.130","DOI":"10.1109\/ISVLSI.2015.130"},{"key":"22","doi-asserted-by":"publisher","unstructured":"[22] Q. Xu, T. Mytkowicz, and N.S. Kim, \u201cApproximate computing: A survey,\u201d IEEE Des. Test, vol.33, no.1, pp.8-22, 2016. 10.1109\/mdat.2015.2505723","DOI":"10.1109\/MDAT.2015.2505723"},{"key":"23","doi-asserted-by":"crossref","unstructured":"[23] T. Cheng, Y. Masuda, J. Nagayama, Y. Momiyama, J. Chen, and M. Hashimoto, \u201cMode-wise voltage-scalable design with activation-aware slack assignment for energy minimization,\u201d Proc. 26th Asia and South Pacific Design Automation Conference, ASPDAC'21, New York, NY, USA, pp.284-290, Association for Computing Machinery, 2021. 10.1145\/3394885.3431575","DOI":"10.1145\/3394885.3431575"},{"key":"24","unstructured":"[24] D. Flynn, Low Power Methodology Manual: For system-on-chip design, 1st. ed., Springer Science & Business Media, 2007. 10.1007\/978-0-387-71819-4"},{"key":"25","doi-asserted-by":"publisher","unstructured":"[25] A.B. Kahng, S. Kang, R. Kumar, and J. Sartori, \u201cEnhancing the efficiency of energy-constrained dvfs designs,\u201d IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol.21, no.10, pp.1769-1782, 2013. 10.1109\/tvlsi.2012.2219084","DOI":"10.1109\/TVLSI.2012.2219084"},{"key":"26","unstructured":"[26] W. Press, S. Teukolsky, W. Vetterling, and B. Flannery, Numerical Recipes: The Art of Scientific Computing, 3rd ed., Cambridge University Press, USA, 2007."},{"key":"27","doi-asserted-by":"publisher","unstructured":"[27] L. Baudzus and P.M. Krummrich, \u201cModified downhill simplex method for fast adaption of optical filters in optical communication systems,\u201d Electron. Lett., vol.55, no.8, pp.471-473, 2019. 10.1049\/el.2018.8151","DOI":"10.1049\/el.2018.8151"},{"key":"28","doi-asserted-by":"publisher","unstructured":"[28] \u00c1. B\u0171rmen, J. Puhan, and T. Tuma, \u201cGrid restrained nelder-mead algorithm,\u201d Comput. Optim. Applic., vol.34, pp.359-375, 2006. 10.1007\/s10589-005-3912-z","DOI":"10.1007\/s10589-005-3912-z"},{"key":"29","unstructured":"[29] http:\/\/www.nangate.com\/index.php, 2009."},{"key":"30","unstructured":"[30] M.R. Guthaus, J.S. Ringenberg, D. Ernst, T.M. Austin, T. Mudge, and R.B. Brown, \u201cMiBench: A free, commercially representative embedded benchmark suite,\u201d IEEE WWC, pp.3-14, 2001. 10.1109\/wwc.2001.990739"}],"container-title":["IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/transfun\/E105.A\/3\/E105.A_2021VLP0006\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,3,5]],"date-time":"2022-03-05T03:22:34Z","timestamp":1646450554000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/transfun\/E105.A\/3\/E105.A_2021VLP0006\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,3,1]]},"references-count":30,"journal-issue":{"issue":"3","published-print":{"date-parts":[[2022]]}},"URL":"https:\/\/doi.org\/10.1587\/transfun.2021vlp0006","relation":{},"ISSN":["0916-8508","1745-1337"],"issn-type":[{"value":"0916-8508","type":"print"},{"value":"1745-1337","type":"electronic"}],"subject":[],"published":{"date-parts":[[2022,3,1]]},"article-number":"2021VLP0006"}}