{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,8]],"date-time":"2026-01-08T21:29:29Z","timestamp":1767907769764,"version":"3.49.0"},"reference-count":5,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"5","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Trans. Inf. & Syst."],"published-print":{"date-parts":[[2017]]},"DOI":"10.1587\/transinf.2016edl8228","type":"journal-article","created":{"date-parts":[[2017,4,30]],"date-time":"2017-04-30T22:14:33Z","timestamp":1493590473000},"page":"1124-1127","source":"Crossref","is-referenced-by-count":4,"title":["RRWL: Round Robin-Based Wear Leveling Using Block Erase Table for Flash Memory"],"prefix":"10.1587","volume":"E100.D","author":[{"given":"Seon Hwan","family":"KIM","sequence":"first","affiliation":[{"name":"Department of Computer Engineering, Yeungnam University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ju Hee","family":"CHOI","sequence":"additional","affiliation":[{"name":"Department of Computer Science and Engineering, Seoul National University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jong Wook","family":"KWAK","sequence":"additional","affiliation":[{"name":"Department of Computer Engineering, Yeungnam University"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"532","reference":[{"key":"1","doi-asserted-by":"crossref","unstructured":"[1] M.-C. Yang, Y.-M. Chang, C.-W. Tsao, P.-C. Huang, Y.-H. Chang, and T.-W. Kuo, \u201cGarbage collection and wear leveling for flash memory: past and future,\u201d 2014 International Conference on Smart Computing (SMARTCOMP), pp.66-73, Nov. 2014.","DOI":"10.1109\/SMARTCOMP.2014.7043841"},{"key":"2","doi-asserted-by":"crossref","unstructured":"[2] Y.-H. Chang, J.-W. Hsieh, and T.-W. Kuo, \u201cImproving flash wear-leveling by proactively moving static data,\u201d IEEE Trans. Comput., vol.59, no.1, pp.53-65, Jan. 2010.","DOI":"10.1109\/TC.2009.134"},{"key":"3","doi-asserted-by":"crossref","unstructured":"[3] S.H. Kim, J.H. Choi, and J.W. Kwak, \u201cHaWL: Hidden Cold Block-Aware Wear Leveling using Bit-Set Threshold for NAND Flash Memory,\u201d IEICE Trans. Inf. & Syst., vol.E99-D, no.4, pp.1242-1245, April 2016.","DOI":"10.1587\/transinf.2015EDL8198"},{"key":"4","unstructured":"[4] Storage Performance Council, http:\/\/traces.cs.umass.edu\/index.php\/Storage\/Storage, 2002."},{"key":"5","doi-asserted-by":"crossref","unstructured":"[5] D. Ma, J. Feng, and G. Li, \u201cA survey of address translation technologies for flash memories,\u201d ACM Computing Surveys (CSUR), vol.46, no.3, pp.1-39, Jan. 2014.","DOI":"10.1145\/2512961"}],"container-title":["IEICE Transactions on Information and Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/transinf\/E100.D\/5\/E100.D_2016EDL8228\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,25]],"date-time":"2017-06-25T15:45:01Z","timestamp":1498405501000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/transinf\/E100.D\/5\/E100.D_2016EDL8228\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017]]},"references-count":5,"journal-issue":{"issue":"5","published-print":{"date-parts":[[2017]]}},"URL":"https:\/\/doi.org\/10.1587\/transinf.2016edl8228","relation":{},"ISSN":["0916-8532","1745-1361"],"issn-type":[{"value":"0916-8532","type":"print"},{"value":"1745-1361","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017]]}}}